RTL / Circuit IP Design Engineer
Advanced Micro Devices Inc
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The focus of this role is to plan, build, and execute the implementation of new and existing features for AMD’s programmable embedded IP, resulting in final designs that meet product defined power, performance, and area targets with intended functionality that operates on silicon and is modeled accurately for customer design use . THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES:
- Collaborate with architects, hardware engineers, and software engineers to understand the new features to be implemented
- Author implementation documentation, accounting for interactions with other features, the hardware, and the software modeling use cases
- Estimate the time required to implement the new features, collaborate with design verification test development, and any execute required changes based on cross functional feedback
- Build the directed and random verification tests
- Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
- Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements
- Proficient in IP level RTL implementation
- Proficient in debugging RTL code using simulation tools
- Proficient in navigating UVM generated test results and working in Linux and Windows environments
- Experienced with Verilog and System Verilog
- Strong understanding of circuit design concepts, translating circuit designs in an optimal way to either custom implementations or with best practices for RTL synthesis
- Automating workflows in a distributed compute environment.
- Proficient in analytical problem solving, specifically with troubleshooting component designs (e.g., timing analysis, constraint setting)
- Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
- Strong background in developing and verifying SAPR constraints
- Good understanding and hands-on experience in UPF concepts
- Good working knowledge of clocking, reset, and power domain crossings with some related experience.
- Scripting language experience: Python, Perl, Ruby, Makefile, shell preferred.
- Exposure to leadership or mentorship is an asset
- Experience with circuit macro generation, characterization, and collateral release processes
- Desirable assets with prior exposure to high speed interfaces
- Bachelors or Masters degree in computer engineering/Electrical Engineering
- ...AMD’s programmable embedded IP, resulting in final designs that meet product defined... ...experience collaborating with other engineers located in different sites/... ...the root cause; work with RTL and firmware engineers to... ...Strong understanding of circuit design concepts,...Suggested
- ...I2Intech LLC in San Jose, CA is seeking an ASIC RTL Design Engineer to develop clean, efficient RTL for IP blocks and subsystems, from micro-architecture specs to synthesis. You will write and optimise Verilog/SystemVerilog, perform linting and timing analysis, and...Suggested
$184.7k - $324.8k
...results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world... ...your solid foundation in digital logic circuits while introducing mixed-signal and... ...high-performance mixed-signal and analog IPs into high-speed digital circuits, ensuring...SuggestedRelocation$116k - $189.75k
...process nodes. Our team drives IP design, and verification for chips... .... Unlike typical VLSI roles, engineers here directly shape products... ...transistor level standard cell circuit design, modeling and... ...be beneficial.Experience with RTL, logic synthesis, and familiarity...SuggestedFull time$168k - $264.5k
...are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If... ...and/or mixed-signal analog circuit IPs for voltage and noise sensing using custom... ...flash ADC design is a plusExperience with RTL, logic synthesis and verification,...SuggestedFull time$136k - $218.5k
...We are now looking for a Senior Circuit Design Engineer! NVIDIA stands at the intersection of hardware excellence and AI breakthrough, where... ...the design and physical implementation of custom digital IPs from RTL to layout using industry standard tools and custom design...Full timeWorldwideShift work$168k - $264.5k
...wave of computing.We are now looking for a motivated Senior Circuit Design Engineer in Power Modeling and Simulation to join our dynamic and... ...Matlab/Simulink, Simplis, Spice, verilogAMS, mixed-signal RTL+spice, s-parameters, etc.Familiarity/experience with industry-standard...Full time- ...shaping the future. Whether you’re designing next-gen processors, enabling... ...or EPYC™ CPU? Join AMD’s CPU engineering team and help shape the power... ..., reset, and power management IP that powers AMD’s next-... ...microarchitecture definition and RTL development through silicon bring...
$150.4k - $277.6k
...Technologies group, you’ll help design our next-generation, high-... ...be at the center of the Pixel IP design effort in pixel processing... ...a Pixel IP DMA Design Engineer in the Pixel IP team, you will... ...Detailing specifications and building RTL designs- Working with design...Relocation- ...is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs... ...for a passionate and innovative RTL design engineer to develop high-performance, multi-... ...RDC etc.Behavioral modeling of custom circuit using Verilog/System VerilogSupport functional...
- ...EngineeringLocation: San Jose, CAContract: ContractPosted: 2026-11-03Deadline: 0001-01-01Our client, Semiconductor & SoC/IP Design is seeking a ASIC/RTL Design Engineer to join their team. As a ASIC/RTL Design Engineer, you will be part of the Engineering organization supporting...Temporary workFlexible hours
$184.7k - $324.8k
...talented Analog Mixed-Signal designers to join our high-speed SerDes... ...delivering intellectual-property (IP) for Apple’s world-leading... ...and high-speed AMS circuits used in SerDes PHY, including... ...large teams and guiding junior engineers to develop circuit components...Relocation$175k - $308.5k
...part of a world-class silicon design team which delivered an... ...You and your team will apply engineering fundamentals and start from scratch... ...of Machine Learning, Circuit design in Apple’s marquee products... ...Backend verification, IR/EM- Write RTL, validate use-cases, verify...Work experience placementRelocation- ...Description:Broadcom is searching for a Digital IC Design Engineer to join the Data Center Solutions Group.... ...aspects of implementation and supporting RTL designs using Verilog/SystemVerilog.... ...designs, and integrating third-party IP.Converging the design to timing closure by...Full timeLocal areaRemote work
$184.7k - $324.8k
...SunnyvalePosted: 2026-07-07SummarySpecify, design and help in the verification... ...up of advanced mixed-signal circuits (digital side).DescriptionIn... ..., you will be responsible for RTL coding of blocks specified by... ...and design verification engineers.Formal tools like LINT, CDC,RDC...Relocation$280k
Job title: ASIC Design Engineer, RTL (Senior/Staff/Principal)Location: San Jose, CA or Colorado Springs, CO (on-site)Salary: $280k-580k total compHelp... ..., and low-power techniques.- Integration: Bring third-party IP into your blocks and make sure it works smoothly with the...- ...shaping the future. Whether you’re designing next-gen processors, enabling... .... You will leverage modern RTL design methodologies, advanced... ...automation in supporting IP development for Silicon implementation... ...teams across multiple engineering disciplines and geographic locations...
- ...Job Title: FPGA / RTL Design Engineer Location: San Jose, CA Job Description: FPGA... ...design, implement, and validate digital circuits and FPGA-based solutions. This role... ...FPGA and digital circuits, integrating IP and system software. Simulation...
$91k - $172k
...IC Design EngineerInsight Global is looking for a few IC Design Engineers to join a leading semiconductor company in Colorado Springs,... ...of implementation and supporting RTL designs using Verilog/SystemVerilog... ..., and integrating third-party IP.Converging the design to timing...RelocationMonday to Friday- ...looking for an experienced CDC/RDC Engineer to work on advanced SoC designs, focusing on Clock Domain Crossing (... ...violations . Work closely with RTL, Design, Physical Design, and Verification... ...CDC/RDC quality across multiple IPs and SoC blocks. Required Skills:...
$80k - $160k
...Job Title: RTL Design Engineer City: Mountain View State/Province: California Posting Start... ...experience ~8+ years of experience delivering successful IP or Application Specific Integrated Circuits (ASIC)/SOC designs related to arbitration and...Minimum wageInternshipLocal area- ...Job Title: RTL Design Engineer Location: San Jose CA - onsite Position: Contract Role Overview: The RTL... ...translates high-level architectural requirements into digital circuit logic using Hardware Description Languages (HDLs). They...Contract work
- ...Astera Labs seeks an experienced Analog/Mixed-Signal (AMS) Circuit Design Engineer to join our high-performance team, focusing on next-generation transceiver IPs at advanced FinFET nodes. You will design high-speed analog and mixed-signal blocks, collaborating with layout...
$175.5k - $311.7k
...SummaryDo you want to utilize your engineering background to make big things... ...? As part of our Digital Design Engineering group, you’ll... ...quick solutions for digital IP designers and/or users.- Define... ...fundamentals in custom transistor level circuits and SRAM designs- Efficient...Relocation$128k - $316.8k
...ASIC Design Engineer Graduate (Video Silicon IP) - 2027 Start Location: San Jose Team: Technology Employment Type: Regular Job Code... ...discipline. Knowledge of Video Codecs. Experience with RTL design (SystemVerilog) or High level Synthesis (HLS)....Temporary workLocal area$185k - $240k
...infrastructure requirements. Discover more at . Principal PCS/PMA RTL Design Engineer Astera Labs is seeking a Principal PCS/PMA RTL Design... ...lane configurations. Integrate internal and third-party IP (including analog/mixed-signal PHY macros) while following...For contractorsFlexible hours- ...shaping the future. Whether you’re designing next-gen processors, enabling... .... You will leverage modern RTL design methodologies, advanced... ...with architects, hardware engineers, and SW-FW engineers to understand... ...the product requirements and IP features.Build early-stage RTL...
$162k - $316.8k
...Responsibilities Team Introduction The Video Silicon IP team is building industry-leading, highly... .... We are looking for strong video codec design engineers to design hardware accelerators for... ...architectures. Design and implement RTL (SystemVerilog/Verilog) for video codec pipeline...Temporary workLocal area- ...AMD is seeking a passionate HW architect for FPGA/ASIC efforts in our San Jose hybrid environment. You will drive RTL design and verification for advanced IP blocks, work with DFT implementations, and collaborate across global teams to meet milestones. You should have...
- ...AMD in Santa Clara seeks a collaborative Physical Design Engineer to drive RTL-to-GDS implementation for high-performance SerDes IP. You will contribute across synthesis, floorplanning, timing-driven place and route, clock tree synthesis, and sign-off, coordinating with...
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