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RISC-V Test Generator Engineer (Python)

Jobleads-US

Qualcomm Technologies, Inc. seeks a skilled verification engineer to contribute to a Python-based random test generation framework and a companion assembler library for a RISC-V CPU design-verification toolchain.

You will implement new generation objects for extensions, plus encoding forms and tests at bit-level accuracy, aligning with the ISA spec. You will work with the privileged software stack, handle page-table constructs, trap/interrupt flows, and collaborate with ISS/RTL teams to triage

#J-18808-Ljbffr Jobleads-US
Vacancy posted 3 days ago
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