ASIC Design Verification Engineering Technical Leader (San Jose)
$183.8k - $263.6kCISCO Systems
The application window is expected to close on: 09/30/2026Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.Meet the Team The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. Your ImpactParticipate in the ASIC design verification for Cisco high-end switching products.Lead, architect, develop, and maintain block, cluster, and top-level Design Verification (DV) environment infrastructure.Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis.Construct testbenches components like scoreboard, agents, sequencers, and monitors.Collaborate with designers, architects, and software teams to debug issues during post-silicon bring-up and integration and customer failures.Ensure comprehensive verification coverage through code and functional coverage implementation and review. Participate in and contribute to chip architecture definition and discussions.Mentor junior engineers on performing project tasks and problem solving.Minimum QualificationsBachelor’s degree in Electrical or Computer engineering and 10+ years of ASIC Design and Verification experience or Master’s degree in Electrical or Computer engineering and 8+ years of ASIC Design and Verification experience.Experience with ASIC design and verification processes (with System Verilog), debugging, methodology, and tools.Experience in leading the verification methodology (in UVM) of clusters/subsystems or full chip level for ASIC.Preferred QualificationsPrior people management experience.Dashboard management for regression, coverage, test list completion and other DV statistics.Post-silicon lab bring-up experience.Experience using emulation platforms such as Veloce, Palladium, Zebu, or HAPSExperience with Linux, C/C++, and/or Python/Perl.Experience in Networking.Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada:The starting salary range posted for this position is $183,800.00 to $263,600.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by CiscoNon-exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employeesExempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the nextAdditional paid time away may be requested to deal with critical or emergency issues for family membersOptional 10 paid days per full calendar year to volunteerFor non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:.75% of incentive target for each 1% of revenue attainment up to 50% of quota;1.5% of incentive target for each 1% of attainment between 50% and 75%;1% of incentive target for each 1% of attainment between 75% and 100%; andOnce performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.The applicable full salary ranges for this position, by specific state, are listed below:New York City Metro Area:$183,800.00 - $303,100.00Non-Metro New York state & Washington state:$163,600.00 - $269,800.00* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.Job SummaryJob number: 2007958Date posted : 2026-07-16Profession: Product and EngineeringEmployment type: Full time
$168.8k - $241.2k
...role requires being onsite in San Jose, CA at least 4 days/week.... ...full product development—from design to qualification to... ...ImpactSet vision and strategy for ASIC verification methodology and execution across... ...and product linesServe as technical authority and mentor for verification...SuggestedFull timeTemporary workPart timeLocal areaFlexible hours$210.6k - $305.1k
...Wireless products. We design the networking... ...of the most complex ASICs being developed in the... ...organization as an ASIC Technical Lead in San Jose with a primary focus... ...the design/design-verification and PD teams to enable... ...or Computer Engineering required with at least...SuggestedFull timeTemporary workPart timeLocal areaFlexible hours$168k - $336k
...for all. Micron Technology is a world leader in innovating memory and storage solutions... ....What’s Encouraged Daily:As a Senior ASIC Design Engineer and domain expert, you will perform... ...website in the About Micron Technology, Inc.SummaryLocation: San Jose, CAType: Full time...SuggestedFull timePart timeLocal areaImmediate start- ...Together, we advance your career. THE ROLE: AMD is looking for an ASIC Design STA engineer to contribute to the development of large SoCs, featuring... .../Electrical Engineering or a related fieldLOCATION: San Jose, CA #LI-RW1#LI-HYBRIDThis role is not eligible for visa sponsorship...SuggestedPart time
$210.6k - $305.1k
...pushing the boundaries of ASIC design for advanced process nodes.... ...Contribute to a multi-disciplined engineering team to meet the power,... ...innovative verification strategiesOversees system level... ...design functions bringing technical expertise to highly complex...SuggestedFull timeTemporary workPart timeLocal areaFlexible hours$165k - $241.4k
...commuting distance of our San Jose, CA office and... ...product development—from design to qualification to... ...unique experience for ASIC engineers by combining the... ...standard timing constraints verification tools such as TCM,... ...problem-solving, and technical communication skills....Full timeTemporary workPart timeWork at officeLocal areaFlexible hours- ...role, you will drive the verification of new and existing... ...with cross-functional engineering teams to deliver robust, bug-free designs. THE PERSON: You are passionate... ...enjoy solving complex technical challenges.You bring... ...Engineering LOCATION: San Jose, CAThis role is not...Part time
- ...the microarchitectural design and RTL implementation... ...synthesis, timing analysis, verification, physical design... ...Work closely with test engineers to implement design-for... ...background experiences in ASIC design.Knowledge of industry... ...EngineeringLOCATION: San JoseThis role is not...Part time
$224.92k - $271.2k
...a high-performing software engineering team to architect, develop,... ...architecture, and mentor engineers in designing resilient, high-performance... ...of global users.Provide technical leadership for designing,... ...we use your data.SummaryLocation: San Jose (CA)Type: Full time...Full timePart timeWork at officeRemote work$191.4k - $281.4k
...of applications are received.Hardware Engineering Technical Leader (hybrid) - 2014270*This position... ...a number of days (TBD) each week in San Jose CA office *Cisco Silicon One is seeking... ...product quality.Methodology Development: Design and implement sophisticated test...Full timeTemporary workPart timeWork at officeLocal areaFlexible hours$183.8k - $263.6k
...team provides a unique experience for ASIC engineers by combining the resources offered by a... ...architecture definition and discussions.Author design specifications and participate in micro... ...problem solving.Collaborate with the verification team to address design bugs and close...Full timeTemporary workPart timeLocal areaFlexible hours$90 per hour
...are looking for talented engineers and leaders who have an entrepreneurial... ...to drive cutting edge designs from concept to silicon to... ...future of mobility. Senior ASIC Design Verification Engineer Summary:... ...position is located in: San Jose, CA Key Qualifications...Flexible hours- ...your career. THE ROLE: As a verification engineer in the AECG Group, you will... ...to life cutting-edge FPGA, ASICs for variety of target customers... ...a member of the front-end design/integration team, you will work... ...Engineering LOCATION: San Jose, CA, OR San Diego, CA OR Austin...Part time
$210.6k - $305.1k
..., and Wireless products. We design the networking hardware for... ...testing some of the most complex ASICs being developed in the industry. Your ImpactAs an ASIC Technical Leader, you will sit at the... ...closely with the design/design-verification and PD teams to enable the integration...Full timeTemporary workPart timeLocal areaFlexible hours$210.6k - $305.1k
...each other grow. Because full product development—from design to qualification to production—is within our team, we’re... ...part of the Silicon One development organization as an ASIC Technical Lead- MBIST engineer. As a member of this team you will be involved in crafting...Full timeTemporary workPart timeLocal areaFlexible hours$183.8k - $263.6k
...grow. Because full product development—from design to qualification to production—is within... .... Your Impact:Define, design and verify ASIC and ASIC subsystems to be deployed in a... ...platforms. Contribute to a multi-disciplined engineering team to meet the power, performance, and...Full timeTemporary workPart timeLocal areaFlexible hours$165k - $241.4k
...grow. Because full product development—from design to qualification to production—is within... ...world. Your ImpactAs a Physical Design Engineer, you will play a key role in the full RTL... ...or Computer engineering and 7+ years of ASIC relevant experience, or Master’s degree in...Full timeTemporary workPart timeLocal areaFlexible hours- ...Position:Physical Design Engineer II (eInfochips Inc)Job... ...assigned partitions of ASIC chip adhering to strict... ...LEC and physical verification signoff for your partitions... ..., or a related technical field, or equivalent... ...Complete On-Site at San Jose, CA.About eInfochips:...Full timePart timeWork at office
$210.6k - $305.1k
...product development—from design to qualification to... ...One initiative. As a technical and team leader, you will drive complex... ...will lead and grow the San Jose package design team, mentoring engineers and developing future... ...Cisco’s next-generation ASIC platforms.Minimum...Full timeTemporary workPart timeFor contractorsWork experience placementLocal areaFlexible hours$210.6k - $305.1k
...One is the center of Cisco’s ASIC design and is driving the... ...Additionally, you’ll collaborate with leaders across different functions... ...will also include Hardware Engineering, Product Management/Marketing... ...ImpactAs a Software Engineering Technical Leader for the Silicon One...Full timeTemporary workPart timeLocal areaFlexible hours$300k - $400k
...Staff ASIC Engineer (Physical Design OR STA)Total package up to $400k (Base up to $200k + bonus + stock... ...realistic income $350-400kLocations: San Jose, CA, Irvine, CA or Fort Collins,... ...productionBe part of a collaborative, technically strong environmentThe Role / ResponsibilitiesAs...Part time$210.6k - $305.1k
...shaping Cisco’s revolutionary solutions for data centers by designing some of the most complex chips being developed in the... ...networking company in the world!What You’ll Do:As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary...Full timeTemporary workPart timeLocal areaFlexible hours$210.6k - $305.1k
...Because full product development—from design to qualification to production—is within... ...timing analysis, power integrity, physical verification and equivalence checks with a focus on... ...’s Degree in Electrical Engineering with 12 + years of Physical Design experience...Full timeTemporary workPart timeLocal areaFlexible hours- ...ROLE:Join AMD's Silicon Design team to design and... ...products. As a Senior ASIC Design Engineer, you will own the... ...belt, you bring deep technical expertise, strong ownership... ..., timing analysis, verification, physical design... ...EngineeringLOCATION: San Jose, CA #LI-RW1#LI-HYBRIDThis...Part time
- ...looking for an Advanced Package Design Engineer who will be responsible for... ...development for FPGA and ASIC products from conception to... ...develop new CAD tools, design and verification flowManage design tech files... ...degree (MS or PhD)LOCATION:San Jose, CAThis role is not eligible...Part timeWork experience placement
- ...seeking an experienced Board Design & Field Systems Engineer to support new product... ...for high-performance FPGA/ASIC platforms, including schematic... ...-level issues.Act as technical liaison for field deployments... ...Engineering LOCATION: San Jose, CAThis role is not eligible...Part time
- ...Tredence Inc.Position Title: Senior Technical LeaderLocation: 1900 Camden Ave., Suite 66, San Jose, CA 95124Position... ...Serve as the senior-most technical leader from Tredence within the GCP partner ecosystem for Data Engineering and Al solutions. Own the end-to-...Part timeRemote work
$211.63k - $306.46k
...ADI) is a global semiconductor leader that bridges the physical and... ...and X.Senior Principal Technical Program Leader – Data Center... ...innovation with world-class engineering, manufacturing, and operations... ...benefits.SummaryLocation: US, CA, San Jose, Rio RoblesType: Full time...Permanent employmentFull timePart timeWork at officeDay shift$183.8k - $263.6k
...development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. You will work with... ...in new waysDefines verification strategiesCoordinates with appropriate... ...Degree in Electrical or Computer Engineering required with at least 8...Full timeTemporary workPart timeLocal areaFlexible hours$168.8k - $241.2k
...full product development—from design to qualification to production... ...development organization as an ASIC DFT STA Technical Lead. You are a detail-oriented STA engineer with strong analytical skills... ...design, CDC/RDC and conformal verification, SDC development.Prior working...Full timeTemporary workPart timeWork experience placementLocal areaFlexible hoursShift work
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