Senior Staff Signal Processing Engineer
$212k - $307kFull-time
Aurora
Who We Are Aurora’s mission is to deliver the benefits of self-driving technology safely, quickly, and broadly. The Aurora Driver will create a new era in mobility and logistics, one that will bring a safer, more efficient, and more accessible future to everyone. At Aurora, you will tackle massively complex problems alongside other passionate, intelligent individuals, growing as an expert while expanding your knowledge. For the latest news from Aurora, visit aurora.tech or follow us on LinkedIn. What We Are Looking For Aurora hires talented people with diverse backgrounds who are ready to help build a transportation ecosystem that will make our roads safer, get crucial goods where they need to go, and make mobility more efficient and accessible for all. We’re searching for a Senior Staff Signal Processing Engineer to help build the next generation of advanced lidar. This role seeks a subject matter expert to lead the development, testing and implementation of DSP algorithms, pipelines and development tools from simulation through to custom silicon, offering the opportunity to lead architectural strategy through close collaboration with photonics, R&D, and electrical engineering teams. In this role you will
- Architect Core DSP Pipelines: Lead the algorithmic strategy, modeling, and architectural implementation of end-to-end signal processing pipelines for next-generation coherent lidar systems.
- Optimize for Hardware Execution: Translate high-level mathematical models into compute-optimized architectures, targeting modern embedded platforms (FPGAs/SIMD) and guiding the hardware specification for future custom silicon (ASIC).
- Bridge Physics and Hardware: Partner closely with photonics, optical R&D, and electrical engineering teams to map physical optical properties and system noise dynamics into practical digital processing algorithms and system requirements.
- Build Simulation & Tooling Environments: Develop scalable, first-principles simulation frameworks and prototyping tools to validate algorithms prior to silicon bring-up and evaluate key trade-offs between performance, power, and area.
- Verification and Bring-Up: Drive the testing, verification, and performance tuning of DSP IP across simulation, hardware emulation targets, initial ASIC silicon bring-up, and real-world system testing.
- Education & Experience: BSc, MSc or Ph.D. in Electrical Engineering, Applied Mathematics, Physics, or a related quantitative field, paired with 10+ years of relevant industry experience in advanced DSP design.
- Advanced Mathematical & DSP Foundation: Expert-level mastery of foundational and advanced signal processing mathematics (e.g., spectral estimation, filtering, phase recovery, modulation/demodulation, detection theory and noise mitigation).
- Relevant Cross-Industry Expertise: Proven track record applying advanced DSP principles within signal-dense domains such as modern radar systems, optical or RF telecommunications, or computational physics.
- Embedded Hardware Targeting: Demonstrated experience mapping and optimizing high-throughput algorithms onto hardware architectures with tight latency, bandwidth, and compute constraints (FPGAs, SoC/SIMD vector engines, and/or ASICs).
- High-Level Modeling Skills: Expert proficiency in Python, C/C++, or MATLAB for modeling, simulation, algorithmic verification, and data analysis.
- High Speed Mixed Signal Integration: Familiarity with high-speed optical/RF front-ends, ADCs/DACs, and the associated digital impairment compensation techniques.
- ASIC Transition Experience: Hands on experience taking complex DSP algorithms from FPGA/SIMD prototyping platforms to custom silicon (ASIC microarchitecture specification, fixed-point optimization, and silicon validation).
- Physics-Based System Modeling: Experience building first-principles models of physical wave propagation, optical coherent detection, RF/optical channel dynamics, or sensor front-end hardware non-idealities.
- Vector & SIMD Optimization: Background writing low-level, compute-optimized code for SIMD architectures, vector engines, or modern DSP hardware accelerators.
Vacancy posted 3 days ago
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