Senior ASIC Digital Architect & IP Integration Lead
Synopsys, Inc.
Synopsys, Inc. is seeking an experienced ASIC Digital Architect in Austin to lead RTL design and verification at chip and block levels. You will define design plans for complex digital designs and focus on high-speed IO protocols such as DDR, PCIe, UCIe, and Ethernet, collaborating with cross-functional teams to ensure integration and performance. You will mentor engineers, apply advanced design methodologies, and communicate with stakeholders to align goals. #J-18808-Ljbffr Synopsys, Inc.
Vacancy posted 19 hours ago
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