Next-Gen Cache & SoC RTL Design Engineer
Qualcomm
Qualcomm Technologies, Inc. is seeking an ASIC Engineer to define, model, and design RTL for SOC Interconnects, caches, and memory subsystems, with a focus on high performance and low power.
You will verify, validate, implement, and document IP development for Qualcomm Snapdragon platforms across smartphones, PCs, VR/AR, and automotive solutions. The team seeks candidates with Verilog/SystemVerilog, Synopsys synthesis, low power design, and DV experience; programming in C/C++/Python is a plus.
#J-18808-LjbffrVacancy posted 23 hours ago
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