PCB Layout Engineering Lead

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership com/index/cerebras-partnership/ with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Cerebras is seeking an exceptional PCB Layout Lead to own the physical implementation of complex, high-performance printed circuit boards for AI systems. This role will translate schematics and engineering requirements into production-ready layouts, optimizing signal integrity, power integrity, thermal performance, reliability, and manufacturability. Responsibilities - Own multilayer PCB layout from initial component placement through fabrication and assembly release. - Translate schematics, mechanical constraints, and electrical requirements into constraint-driven board designs using industry-standard PCB layout tools. - Define and implement board stackups, controlled-impedance structures, routing rules, reference planes, return paths, and length- and phase-matching constraints. - Place and route high-speed digital, high-current power, and sensitive analog circuits, including dense BGA fanout and differential interfaces. - Apply signal-integrity and power-integrity best practices to minimize crosstalk, discontinuities, noise, voltage drop, and electromagnetic interference. - Collaborate with electrical, SI/PI, mechanical, thermal, compliance, manufacturing, and test engineers to establish constraints and resolve layout issues. - Work with fabrication and assembly partners to select materials, validate stackups and via structures, and improve yield, cost, and schedule.

- Perform design reviews and DFM, DFA, and DFT checks; generate and verify fabrication drawings, assembly drawings, drill data, Gerbers, ODB++, IPC-2581, and related release packages. - Maintain component footprints, padstacks, design libraries, layout standards, and release documentation. - Support prototype builds, board bring-up, failure analysis, and layout revisions through production. Minimum Qualifications - Bachelor’s degree in electrical engineering, electronics engineering, or a related field, or equivalent practical experience. - 10+ years of hands-on experience laying out complex, high-speed, multilayer printed circuit boards. - Expertise with Cadence Allegro PCB Designer and Constraint Manager; experience with Altium Designer or equivalent tools is also relevant. - Strong knowledge of component placement, controlled-impedance routing, differential pairs, length matching, return-path continuity, and power distribution. - Experience with dense BGA escape routing, HDI structures, blind and buried vias, microvias, via-in-pad, and backdrilling. - Working knowledge of signal integrity, power integrity, EMI/EMC, thermal design, creepage and clearance, and high-current routing. - Experience applying IPC standards and fabrication, assembly, test, and manufacturability requirements. - Ability to create and review complete PCB fabrication and assembly release packages. - Ability to thrive in a fast-paced, dynamic environment and adapt to changing priorities. - Excellent collaborative and interpersonal skills with multi-disciplined teams. - Experience working on server hardware, AI accelerators, hardware accelerator, datacenter, AI Hardware, enterprise product, GPU, CPU, TPU, server platform etc.