Senior Physical Design Engineer - Floorplanning & Tapeout
$120k - $192kBroadcom Inc.
Broadcom Inc. is seeking an ASIC top level floorplan Physical Design Engineer to join the Asic Products Division in San Jose. This role involves working with advanced technologies to drive the next generation of Artificial Intelligence and PCIe Switch Products. As an expert in physical design, you will own chip floor planning and must have 8+ years experience in the domain. The position offers a competitive salary ranging from $120,000 to $192,000, including comprehensive benefits and no remote work is allowed. #J-18808-Ljbffr Broadcom Inc.
- Responsibilities Responsible for all aspects of physical design and implementation of GPU and other... ...methodologies, flow automation, chip floorplan, power/clock distribution, chip... ...extraction and correlation, place/route and tapeout solutions. Strong analytical and debugging...Senior
- ...Job Title: Senior Physical Design Engineer (MULTIPLE OPENINGS) Salary Range : $216,091-218,000/ Year / 40HRS/WK Location: Cupertino... ...full-chip, block-level, and partition-level, including floorplanning, placement, clock tree synthesis (CTS), routing, timing...Senior
$178k - $389k
Micron Technology, Inc in San Jose, California, is seeking a Physical Design Engineer to lead the full physical design flow for high-speed... ...will be responsible for defining and implementing full-chip floorplans, executing place and route, and ensuring timing closure. The...Senior$140k - $170k
Credo is engineering the future of high-speed connectivity for the... ...Electrical Cables (AECs) all designed for maximum performance,... ...Connect. About the Role As a Senior Physical Design Engineer, you will... ...methodologies, flow automation, chip floorplanning, power/clock distribution,...SeniorLocal area$200k - $220k
Staff / Senior Staff Physical Design Engineer Bolt Graphics is a semiconductor startup based in Sunnyvale, CA building the fastest and most efficient... ...-to-end physical design flow: synthesis support, floorplanning, placement, CTS, routing, and signoff Drivetiming closure...Senior$136k - $264.5k
NVIDIA Corporation is seeking a Senior Physical Design Engineer located in Santa Clara, California. The successful candidate will drive physical design and timing, partner with mixed signal teams, and perform physical verification checks. Candidates should possess a BS...Senior$170k - $230k
SpaceX is seeking a Sr. SOC/ASIC Physical Design Engineer to develop next-generation silicon for space and ground infrastructures. You'll work with top engineers across various disciplines to enhance the Starlink network, enabling connectivity globally. Ideal candidates...Senior$136k - $218.5k
## Senior Physical Design EngineerApplylocations: US, CA, Santa Claratime type: Full timeposted on: Posted Yesterdayjob requisition id: JR2017826We are now looking for a motivated Physical Design Engineer to join our dynamic and growing team. If you want to challenge yourself...Senior$120k - $220k
...that will fundamentally change the design, economics, manufacturing and... .... WHAT YOU WILL BE DOING: Lead physical design implementation from floorplanning through GDSII sign‑off for complex... ...methodology development and mentor junior engineers WHAT YOU BRING TO THIS ROLE:...SeniorFull timeWork at officeImmediate startVisa sponsorship$168k - $264.5k
...inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are looking for a physical design engineer to be a part of NVIDIA’s physical design (PD) methodology team driving innovation in PD across all of NVIDIA's products -...Senior- NVIDIA Gruppe is looking for a skilled physical designer to handle the design and implementation of GPUs and other ASICs targeted at diverse markets such as desktop and mobile. Ideal candidates will possess at least 5 years of experience in VLSI design implementation, with...Senior
$200k - $220k
A semiconductor startup in California is seeking a Staff/Senior Staff Physical Design Engineer to lead physical design implementations. The role requires 8-12 years of experience in ASIC design, with a focus on timing, power, and area optimizations. Candidates should have...Senior- Broadcom Inc. is looking for a Physical Design Engineer to join the ASIC Products Division in San Jose, CA. This role involves working with cutting-edge technology to drive next-gen AI designs while executing Physical Design and Verification processes. The ideal candidate...Senior
- A tech-focused company in San Jose is seeking exceptional Physical Design engineers to own block-level implementation and verification. Responsibilities include driving timing closure and PPA optimization, collaborating with RTL Designers, and supervising design flow improvements...Senior
- Itlearn360 is seeking a CPU Physical Design Engineer to focus on block-level physical design in Santa Clara, CA. You'll drive design convergence goals and collaborate with various teams on key design elements. The ideal candidate has a Bachelor's degree with a minimum...
$143.1k - $264.2k
SoC Physical Design Engineer, PnR job at Apple Inc.. Sunnyvale, CA. Imagine what you could do here!... ...design partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative... ...level P&R implementation including floorplanning, clock and power distribution, timing...Relocation$170k - $230k
...enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we’... ...steps (e.g. synthesis, floorplanning, power/ground grid generation, place... ...Pay range: Physical Design Engineer/Senior: $170,000.00 - $230,000.00 per year...SeniorPermanent employmentTemporary workWorldwideWeekend work- ...As a Persimmons RTL to PD Engineer, you will be responsible for... ...and static checks. Ensuring designs meet quality, performance,... ...corner environments. Execute floorplanning and physical implementation using... ...designs from synthesis through tapeout on real silicon....Full timeFlexible hours
- A leading technology company in California seeks a seasoned Physical Design Engineer to lead projects in advanced semiconductor technology. The ideal candidate will have 8-10 years of experience in the RTL-to-GDS flow and proficiency with EDA tools such as Fusion Compiler...Senior
$120k - $220k
E-Space is looking for an experienced Physical Design Engineer to lead complex ASIC and SoC designs. With a focus on innovative satellite technology, you'll work with cutting-edge tools like Cadence Innovus. The role requires a minimum of 8 years of experience in physical...Senior$153.2k - $229.8k
Qualcomm is seeking an experienced ASIC Engineer to drive the development of high-performance IP for world-class products in Santa Clara... ...candidate should have at least 4 years of experience in ASIC design and possess a relevant degree. Responsibilities include defining...Senior$150k - $180k
Piper Companies is seeking a Senior Substrate Layout Designer who will be responsible... ...Lead the end-to-end physical layout of high-density, multi... ..., considering die floorplans and mechanical constraints... ...Bachelor’s degree in Electrical Engineering or equivalent experience....SeniorRemote work- ...JD: Job Overview: We are looking for a highly skilled Physical Design Engineer to work at block level and/or top level for high-performance... ...Design: • Floor planning & Partitioning – Define optimal floorplan with power grid, macro placements, and congestion analysis...
- ...We are seeking a Physical Design contractor with strong synthesis and implementation expertise to support large, timing-critical designs... ...synthesis and early implementation stages Develop and refine floorplans using Cadence Innovus Collaborate closely with RTL teams...For contractors
$116k - $246k
Overview As a Sr. or Staff Design Engineer in the NVE Design Engineering Analog group at Micron... ...Design, simulate, optimize, and floorplan NAND analog and mixed‑signal circuits,... ...fundamentals in semiconductor and device physics and analog/mixed‑signal circuit design....SeniorLocal area- An innovative AI infrastructure startup in the United States is seeking a Physical Design Engineer with over 10 years of experience. You will be responsible for defining the Physical Assembly of SoC and developing methodologies to optimize performance for AI data centers...Senior
- ...We are looking for a Senior/Staff STA Engineer to lead full-chip timing signoff activities for cutting-... ...budgeting, ECO convergence, and final tapeout signoff. This role requires close collaboration with RTL, Physical Design, Clocking, to achieve timing closure for...Full time
- ...We are seeking a Senior/Staff Physical Design Engineer with deep expertise in top-level clock architecture and CTS implementation for advanced-node SoCs... ...RTL, and Power teams to ensure robust clock quality and tapeout readiness. Key Responsibilities Design and...
- Qualcomm is looking for a CPU Engineer to lead innovative CPU design efforts critical to multiple industries. You'll collaborate with cross-functional teams to ensure high performance and low power CPU designs while documenting technical specifications. This role requires...Senior
- ...semiconductor company is seeking an experienced ASIC/Layout Design Engineer to oversee the entire ASIC development process, from... ...GDSii. Candidates must have a strong background in physical design, including floorplanning and block assignment, along with proficiency in...Senior
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