Senior Mixed-Signal IP Verification Engineer
$141.91k - $200.34kIntel
Intel is looking for a Mixed Signal Design Verification Engineer in Phoenix, Arizona. In this role, you will ensure the functionality of Intel's mixed signal components essential for semiconductor solutions. You'll develop verification plans and collaborate across teams to meet design specifications. Candidates should have expertise in System Verilog, UVM, and debugging skills. The position offers a competitive salary range from $141,910 to $200,340 with on-site requirements. #J-18808-Ljbffr Intel
Vacancy posted 2 days ago
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$141.91k - $200.34k
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