Electronics Engineering Technology

Overview Yield Enhancement Engineer, Texas Institute for Electronics
Texas Institute for Electronics (TIE)
About Us The Texas Institute for Electronics (TIE) is a University of Texas at Austin-supported semiconductor consortium of state and local government, pre-eminent defense electronics and semiconductor companies, national labs and nationally recognized academic institutions. Our mission is to develop and execute a state-of-the-art 3D Heterogenous Integration manufacturing technology roadmap, and to provide critical pilot manufacturing capabilities to address national security needs and catalyze domestic economic growth. Join the Texas Institute for Electronics (TIE) and help us push the boundaries in critical semiconductor domains, including advanced packaging, with the aim of reestablishing U.S. prominence in semiconductor manufacturing. With over $1 billion in funding from the US DoD and the state of Texas, we’re at the forefront of creating cutting-edge semiconductor manufacturing equipment and processes that will set the course for future advancements in semiconductor logic, memory, heterogeneous integration, chip cooling and more. Competitive health benefits, voluntary insurance options, paid vacation, sick time and holidays, state retirement plans and other programs. Responsibilities Analyze electrical, inline, defectivity, and reliability data to identify yield loss mechanisms and drive corrective actions.
Develop and execute yield improvement plans for NPI and high-volume manufacturing products.
Correlate process parameters with yield, reliability, and device performance metrics.
Drive root cause analysis using DOE, SPC, Pareto analysis, FMEA, and statistical methodologies.
Support technology transfer from development to manufacturing with stable process windows and manufacturability improvements.
Work closely with process, equipment, quality, product, reliability, and customer teams to resolve technical issues.
Define process control strategies, specifications, and yield monitoring methodologies.
Participate in failure analysis reviews and develop containment/corrective action plans.
Support customer qualification activities and technical discussions.
Generate technical reports, presentations, and documentation for management and customers.
Required Qualifications Bachelor’s degree in Materials Science, Chemical Engineering, Electrical Engineering, Physics, or related field
3 years of semiconductor Process Integration or Yield Engineering experience
Strong understanding of semiconductor fabrication or advanced packaging process flows
Experience with statistical data analysis tools such as JMP, Minitab, Python, or Excel. Knowledge of SPC, DOE, Cp/Cpk, yield analysis, and defect reduction methodologies
Familiarity with electrical test data analysis and inline metrology correlation. Experience supporting NPI and high-volume manufacturing environments
Preferred Qualifications Master’s degree or higher in Materials Science, Chemical Engineering, Electrical Engineering, Physics, or related field
More than 3 years of semiconductor Process Integration or Yield Engineering experience
Experience in advanced packaging technologies such as hybrid bonding, TSV, Cu damascene, or wafer-level packaging
Experience with automation/data visualization tools
Customer-facing technical support experience. Exposure to AI/ML-based yield analytics is a plus.
Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
Voluntary Vision, Dental, Life, and Disability insurance options
Generous paid vacation, sick time, and holidays
Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds
Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
Flexible spending account options for medical and childcare expenses
LinkedIn Learning access and conference opportunities
Free rides on UT Shuttle and CapMetro buses with staff ID
A criminal history background check will be required for finalist(s) under consideration.
Non-discrimination protections apply to race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status.
Pay Transparency, Employment Eligibility Verification, and compliance information are provided as part of the application process.

#