Senior Standard Cell Engineer - Hybrid, PPA & Validation
Intel
Intel in US (CA Santa Clara / Folsom) seeks a Senior Design Engineer to advance standard cell experiments, characterization, and validation. You will implement all aspects of the physical design flow, optimize timing and power, and collaborate across teams to ensure robust, high‑quality outcomes. The role demands strong communication, problem solving, and hands-on experience with Cadence and Synopsys toolchains. A Bachelor’s in a STEM field is required and a hybrid work model is offered. #J-18808-Ljbffr Intel
Vacancy posted 13 hours ago
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