Senior Memory Subsystem Firmware Engineer

NVIDIA's SoC Memory Subsystem team is looking for a strong, senior DRAM firmware engineer to own memory firmware from architecture through production silicon. You’ll lead in areas of DRAM initialization and training across DDR/LPDDR, drive interface tuning across process, voltage, and temperature corners, and set the direction for how we take new memory interfaces from pre‑silicon to production.

What you’ll be doing:

• Own DRAM firmware across its lifecycle — architecture, implementation, silicon bring‑up, and production tuning.
• Design and implement DRAM initialization and training sequences: training protocols, calibration algorithms, and their firmware implementation.
• Characterize and tune the DRAM interface across PVT (process / voltage / temperature) variation to hold margins across corners.
• Drive the memory bring‑up and validation strategy; root‑cause complex hardware/software interactions in the lab and in pre‑silicon.
• Set firmware quality bar — code review, profiling, and coverage — and mentor early‑career engineers on the team.
• Refine our interface bring‑up and validation strategy.

What we need to see:

• BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or related field (or equivalent experience).
• 6+ years of relevant DRAM / memory firmware development for high speed LPDDR or system DDR memories.
• Strong command of DRAM initialization and training — protocols, calibration algorithms, and their implementation in firmware.
• Deep understanding of DRAM interfaces and how PVT (process / voltage / temperature) variation affects timing, training, and margining.
• Proficiency in C/C++, with a solid grasp of data structures, compilers, and build and version‑control tooling.
• Excellent debugging skills; able to decompose hard, ambiguous failures from first principles.

Ways to stand out from the crowd:

• Breadth across DDR / LPDDR / HBM and multiple DRAM vendors.
• Signal‑integrity intuition and comfort working with analog/mixed‑signal behavior.
• Understanding of ASIC boot architecture.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 184,000 USD - 287,500 USD for Level4, and 224,000 USD - 356,500 USD for Level5.

You will also be eligible for equity and benefits.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.