Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Design Verification Engineer (eInfochips Inc)

Arrow ECS

## Design Verification Engineer IVApplylocations: US-CA-San Jose, Californiatime type: Full timeposted on: Posted Todayjob requisition id: R243001# **Position:**Design Verification Engineer IV# **Job Description:****What You'll Be Doing:*** Strong SV/UVM expertise* AXI/NOC/Ethernet/PCIe/UCIe Switch expertise is needed* CPU ARM/RISC-V with C knowledge* Regression & Coverage Closure**What We Are Looking For:*** Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development.* Develop complex self checking test benches with constraint random stimulus generation.* Architect SoC test FW and create test plan documentation to cover ASIC features.* Develop and debug SoC ASIC platform test FW and specific tests in C/C++.* Partner in methodology development activities & actively planning, analyzing and reviewing functional and technical specification documents.* Implement and maintain integrated end-to-end formal verification flow for the formal verification objective.* Develop/modify scripts to automate the verification process.* Develop verification environment including environment assumptions, assertions, and cover properties in context of the verification plan.* Requires in-depth knowledge and experience.* Solves complex problems; takes a new perspective using existing solutions.* Works independently; receives minimal guidance* Acts as a resource for colleagues with less experience.* Represents the level at which career may stabilize for many years or even until retirement* Uses best practices and knowledge of internal or external business issues to improve products/services or processes* Typically resolves complex problems or problems where precedent may not exist* Often leads the work of project teams; may formally train junior staff* Works independently* Typically requires a minimum of 8 years of related experience with a 4 year degree; or 6 years and an advanced degree; or equivalent experience.**What’s In It for You:**At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why we offer competitive financial compensation, including various compensation plans and a solid benefits package.* Medical, Dental, Vision Insurance* 401k, With Matching Contributions* Short-Term/Long-Term Disability Insurance* Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options* Paid Time Off (including sick, holiday, vacation, etc.)* Tuition Reimbursement* Growth Opportunities* And more!**Work Arrangement Fully OnSite:** Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.**Location:**Complete On-Site at San jose, CA (complete Onsite)**About eInfochips:** eInfochips, an Arrow company (Fortune #154), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow’s $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit for our portfolio of product engineering services across various industries & verticals.**EEO Statement:** Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)# **Annual Hiring Range/Hourly Rate:**$112,200.00 - $176,000.00Actual compensation offer to candidate may vary from posted hiring range based upon geographic location, work experience, education, and/or skill level. The pay ratio between base pay and target incentive (if applicable) will be finalized at offer. # **Location:**US-CA-San Jose, California (eInfochips)# **Time Type:**Full time# **Job Category:**Engineering Services# **EEO Statement:**Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)*All Arrow job postings are for existing job vacancies*. *We anticipate this requisition will be open for a minimum of five days, though it may be open for a longer period of time. We encourage your prompt application.**In any materials you submit, you may redact or remove age-identifying information such as age, date of birth, or dates of school attendance or graduation. You will not be penalized for redacting or removing this information.* #J-18808-Ljbffr

Vacancy posted 5 days ago
Similar jobs that could be interesting for youBased on the Design Verification Engineer (eInfochips Inc) in San Jose, CA vacancy
  •  ...Position:Physical Design Engineer II (eInfochips Inc)Job Description:WhatYou'llBeDoing:Execute synthesis, PNR, and STA for assigned partitions of...  ...across your blocks.Help close EM/IR, drive LEC and physical verification signoff for your partitions in coordination with... 
    Suggested
    Full time
    Work at office

    Arrow ECS

    San Jose, CA
    1 day ago
  •  ...Position:Design Verification Engineer (Einfochips)Job Description:Experience: 6+ YearsLocation: San Jose CAJob Description:What candidate will Be Doing:At-least6+ years of experienceinSystem Verilog HVL and C++/CAt-least 6+ year of experience inUVM.Experience in complete... 
    Suggested
    Full time
    Work at office

    Arrow ECS

    San Jose, CA
    5 days ago
  • $150k - $180k

     ...degree in Electrical or Computer Engineering or a Masters degree in a...  ...: Develop and execute verification plans in collaboration with...  ...LESS More: We are eInfochips, an Arrow company, and a prominent...  ...engineering and semiconductor design services with a rich history... 
    Suggested
    Full time
    Night shift

    Arrow Electronics, Inc.

    San Jose, CA
    4 days ago
  • $107.4k - $161.2k

     ...Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group ASICS EngineeringGeneral...  ...Engineer, you will define, model, design (digital and/or analog), optimize,...  ....6+ months of experience with design verification methods.Principal Duties &... 
    Suggested
    Work from home

    Nutanix

    Santa Clara, CA
    4 days ago
  • $107.4k - $161.2k

     ...Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group ASICS Engineering...  ...Engineer, you will define, model, design (digital and/or analog), optimize,...  ...6+ months of experience with design verification methods. Principal Duties &... 
    Suggested
    Work from home

    Qualcomm

    Santa Clara, CA
    4 days ago
  • $156.85k - $160k

     ...Nextgen Technologies Inc., has openings for Design Verification Engineer in San Jose, CA: Job Title: Design Verification Engineer Job Duration: 40 Hours / Week, Permanent position, Full time J ob Duties: Collaborate with design and development teams to understand... 
    Permanent employment
    Full time

    Nextgentechinc

    San Jose, CA
    3 days ago
  •  ...Texas Instruments is looking for a candidate that is interested in working in a challenging, fast-paced environment. As a Design Verification Engineer-AMS you will get to directly interact with one of TI's high-volume and high-impact customers and will help architect new... 
    Local area
    Immediate start

    Texas Instruments

    Santa Clara, CA
    1 day ago
  • $167.7k - $245.2k

     ...and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able...  ...the digital world.Your ImpactSet vision and strategy for ASIC verification methodology and execution across multiple programs and product... 
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    3 days ago
  • $100k

     ...problems. We are growing our team and looking for contributors of all seniorities.Tenstorrent is looking for a Mid Core Design Verification Engineer to help verify the next generation of high-performance RISC-V CPU cores. You’ll work closely with CPU architects, RTL designers... 
    Permanent employment

    Tenstorrent

    Santa Clara, CA
    3 days ago
  • $141.91k - $269.1k

     ...Details:Job Description: Performs functional verification of graphics logic components, including...  ..., media, and display, to ensure design will meet specification requirements.Defines...  ...’s degree in electronics, computer engineering, or related engineering with 5+ years of... 
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Santa Clara, CA
    4 days ago
  • Change the world. Love your job. Texas Instruments is seeking Design Verification Engineer. In this role you will confirm the accuracy of designs for analog and mixed signal electronic parts, components, or integrated circuitry for analog and mixed signal electronic equipment... 
    Local area

    Texas Instruments

    Santa Clara, CA
    4 days ago
  •  ...enterprise environments, including Goldman Sachs, IBM Cloud, Microsoft Azure, and Oracle.THE PERSON:We are seeking a high‑impact Design Verification Engineer with strong technical depth, ownership, and the ability to drive verification closure on complex, high‑performance ASIC... 

    AMD

    Santa Clara, CA
    1 day ago
  • $167.7k - $245.2k

     ...and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able...  ...world. Your Impact Set vision and strategy for ASIC verification methodology and execution across multiple programs and product... 
    Full time
    Temporary work
    Local area
    Flexible hours

    Cisco

    San Jose, CA
    4 days ago
  • $80 - $90 per hour

     ...0/hr Direct message the job poster from Infotree Global Solutions We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve client's abilities... 
    16 hours
    Contract work

    Infotree Global Solutions

    Santa Clara, CA
    1 day ago
  •  ...high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating...  ...ROLE:We are looking for an adaptive, self-motivated design verification engineer to join our growing team. As a key contributor, you will be... 

    AMD

    San Jose, CA
    1 day ago
  • $97.7k - $182.62k

     ...job and more exclusive features. Direct message the job poster from Capgemini Engineering About the Job You're Considering Join a collaborative and forward-thinking team as a Design Verification Engineer, contributing to the validation of advanced System-on-Chip (SoC)... 
    16 hours
    Full time
    Local area

    Capgemini Engineering

    Santa Clara, CA
    5 days ago
  •  ...Looking for Design Verification Engineer with following skills: UVM / UPF / VIP System Verilog / VHDL SOC verification Python or TCL Seniority level ~ Associate Employment type ~ Contract Job function ~ Management, Design, and Information... 
    Contract work

    Millennium Software

    San Jose, CA
    1 day ago
  • $105.65k - $149.15k

     ...About Intel & Silicon Chassis Intel is seeking an Entry Level Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to the verification of next-generation interconnect and chassis IPs that underpin Intel's most ambitious SoC and... 
    Work experience placement
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Santa Clara, CA
    4 days ago
  •  ...Design Verification – 6+ Years Experience – H1B Job Requirements Location: San Jose, CA, USA Role Summa ryThe Senior Engineer – DV is responsible for leading and executing end-to-end design verification activities for IP, Subsystem, or SoC-level projects.... 
    H1b
    Remote work

    Value Innovation Labs

    San Jose, CA
    2 days ago
  •  ...Change the world. Love your job. Texas Instruments is seeking Design Verification Engineer. In this role you will confirm the accuracy of designs for analog and mixed signal electronic parts, components, or integrated circuitry for analog and mixed signal electronic... 
    Local area

    Texas Instruments

    Santa Clara, CA
    3 days ago
  • $126.8k - $190.9k

     ...bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple’s premier SOCs. This is a critical job... 
    Relocation

    Apple

    Cupertino, CA
    1 day ago
  • $143.8k - $230k

     ...candidate will join a high‑performance design team responsible for state‑of‑the‑art subsystem...  .... Responsibilities Develop verification environments using modern verification...  ...’s Degree in Electrical and Electronic Engineering, Computer Science, or equivalent. ~12... 
    Work experience placement
    Local area

    Broadcom Corporation

    San Jose, CA
    5 days ago
  •  ...Join to apply for the Design Verification Engineer role at Quest Global Quest Global delivers world‑class end‑to‑end engineering solutions by leveraging deep industry knowledge and digital expertise. The company solves complex challenges across aerospace & defense, automotive... 
    Full time

    QuEST Global

    San Jose, CA
    3 days ago
  •  ...Job Description – Senior Design Verification Engineer Experience: 3-10 Years Location: Bangalore / Ahmedabad / Pune / Hyderabad Job Overview: We are seeking an experienced and highly skilled Senior Design Verification Engineer with 3-10 years of hands-... 

    Eximietas Design LLC

    San Jose, CA
    1 day ago
  •  ...Role Overview We are looking for talented Design Verification Engineers to help verify and deliver Velaura's next generation Physical AI SoC. You will work closely with architects, RTL engineers, software engineers and system teams to establish confidence in the correctness... 

    Socket

    Santa Clara, CA
    4 days ago
  •  ...Opportunity: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team, working on state of the art...  ...you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability.... 
    Contract work

    CirrusLabs

    Santa Clara, CA
    5 days ago
  • $120k - $200k

     ...one of their most valuable assets. About The Team The Design Verification team works on the RDU, SambaNova's chip for machine learning...  ...environments alongside architects, RTL designers, and firmware engineers, and take ownership of verification plans from first draft... 
    Full time
    Temporary work
    Local area
    Flexible hours

    SambaNova

    San Jose, CA
    1 day ago
  •  ...GPU DFT Design Verification Engineer Work Locations (2) Submit Resume Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and... 

    Apple

    Cupertino, CA
    3 days ago
  •  ...Top Skills: SystemVerilog UVM; IP design verification; Physical (PHY) layer; SoCs THE ROLE: We are seeking a seasoned verification lead with expertise or significant interest in IO/PHY verification . You have had significant success driving IP verification ,... 

    Infobahn Softworld

    Santa Clara, CA
    4 days ago
  •  ...Design Verification Engineer Location: Santa Clara, CA Duration: Long term Experience: 8-15 Years Key Responsibilities Strong understanding of SystemVerilog (SV) and UVM and good debugging skills. Understanding of AMBA protocols. Understand design... 

    I-Flow

    Santa Clara, CA
    1 day ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Design Verification Engineer (eInfochips Inc). Be the first to apply!