Design Engineer

Job Description

Job Description

Job Title: Design Engineer Semiconductor Layout Automation and EDA Innovation Job Description

This role focuses on transforming how semiconductor layouts are created by combining EDA automation, software development, and emerging AI capabilities. You will design and build automation tools, workflows, and intelligent platforms that significantly reduce layout cycles and improve engineering productivity. The position is ideal for an experienced design automation or CAD/EDA professional who understands semiconductor design workflows and enjoys developing robust software solutions that scale across engineering teams.

• Design, develop, and maintain automation tools and platforms that streamline semiconductor physical design and layout workflows.
• Leverage Cadence Virtuoso and related EDA tools to create, enhance, and support layout automation solutions.
• Build software solutions in Python to automate repetitive tasks, integrate tools, and enable intelligent design flows.
• Develop and support place-and-route and routing automation for high-density interconnect and advanced packaging environments.
• Collaborate closely with cross-functional technical teams, including design, CAD, and infrastructure groups, to understand requirements and translate them into scalable automation solutions.
• Create workflow automation platforms and engineering productivity tools that reduce layout cycle times from months to weeks.
• Develop data-driven metrics and ROI-focused automation strategies to measure impact and continuously improve tools and workflows.
• Integrate AI, machine learning, generative AI, or AI agents into EDA workflows where applicable to enhance efficiency and design quality.
• Use scripting and programming (such as SKILL, shell, and TCL) to customize and extend EDA tool capabilities.
• Collaborate with stakeholders to define the roadmap for future layout automation, advanced packaging flows, and next-generation design methodologies.
• Provide technical guidance, documentation, and support to engineering teams using the developed tools and platforms.
• Ensure that automation solutions follow modern software development practices and can be deployed and maintained reliably, including in cloud environments.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 8+ years of experience within semiconductor physical design, layout automation, CAD/EDA engineering, advanced packaging, or related environments.
• Strong experience with Cadence Virtuoso, particularly in layout and physical design environments.
• Proven experience developing software solutions using Python.
• Hands-on experience with physical design, routing, place-and-route, or high-density interconnect environments.
• Demonstrated experience building automation tools used by engineering teams.
• Ability to work effectively in cross-functional settings with multiple technical organizations.
• Strong communication skills with the ability to influence at a principal level.
• Semiconductor EDA experience, including practical use of industry-standard tools and flows.
• Place-and-route and routing expertise applied to complex semiconductor designs.
• Experience in automation and tool development focused on improving engineering productivity.

• Experience with SKILL scripting for Cadence environments.
• Experience with KLayout for layout visualization and manipulation.
• Experience using Siemens Calibre for verification and signoff.
• Experience with Cadence Allegro.
• Advanced packaging experience, including 2.5D and 3D IC.
• Experience in silicon photonics design or related workflows.
• Shell scripting experience for automation and tool integration.
• TCL development experience for EDA tool customization and flow control.
• Machine learning, generative AI, or AI agent development experience applied to engineering workflows.
• Experience building workflow automation platforms and engineering productivity tools.
• Experience creating data-driven metrics and ROI-focused automation strategies.
• Familiarity with cloud computing and modern software development practices.
• Backgrounds that may be a strong fit include Principal Design Automation Engineer, CAD Automation Engineer, EDA Software Engineer, Physical Design Automation Engineer, Layout Automation Architect, Design Infrastructure Engineer, or CAD Methodology Engineer.
• Strong understanding of semiconductor design workflows and how to automate them.
• Substantial hands-on software development experience beyond basic scripting.

The role offers flexibility with a preferred hybrid or onsite presence in locations such as Minnesota, Los Angeles, or Broomfield. Fully remote work from other locations is possible for highly qualified candidates who can operate independently and collaborate effectively across distributed teams. You will work in a technology-driven environment that uses industry-standard EDA tools such as Cadence Virtuoso, KLayout, Siemens Calibre, and Cadence Allegro, along with Python, SKILL, shell scripting, TCL, and modern cloud-based development practices. The work focuses on advanced semiconductor design, including physical design, high-density interconnect, advanced packaging, and potentially silicon photonics, with a strong emphasis on automation, AI-driven tooling, and continuous improvement of engineering workflows.

This is a Permanent position based out of Broomfield, CO.

The pay range for this position is $100000.00 - $230000.00/yr.

Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.

Bonus 5-10%Company Benefitscompetitive.

This is a fully remote position.

This position is anticipated to close on Oct 7, 2026.

About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications withoutregard to race, sex, age, color, religion, national origin, veteran status, disability,sexual orientation, gender identity, genetic information or any characteristic protectedby law.

If you would like to request a reasonable accommodation, such as the modification oradjustment of the job application process or interviewing process due to a disability,please email View email address on ziprecruiter.com for other accommodation options.

San Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in thecity and county of San Francisco, we will consider for employment qualified applicantswith arrest and conviction records.

Massachusetts Lie Detector: It is unlawful in Massachusetts to require or administer a lie detector test as acondition of employment or continued employment. An employer who violates this lawshall be subject to criminal penalties and civil liability.

Use of Artificial Intelligence (AI): We may use Artificial Intelligence (AI) to support parts of our hiring process,including sourcing, screening, and evaluating candidates. AI helps assess applicationsand qualifications, but final decisions are made by our hiring team. By applying, youacknowledge and agree that your application may be reviewed using AI tools.