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  • $108k - $184k

    Join to apply for the ASIC Design Verification Engineer - New College Grad 2026 role at NVIDIA . NVIDIA has continuously reinvented itself over two...  ...The NVIDIA System‑On‑Chip (SOC) group is looking for an entry‑level ASIC Verification Engineer. In this position you will... 
    Entry level
    Full time

    NVIDIA

    Austin, TX
    2 days ago
  • $160k - $275k

     ...availability. MatX is seeking silicon physical design engineers to join our team as we create best-in-...  ...subsystems or subsets and/or chip-level Physical Design deliverables including but...  ...8 years of industry experience in ASIC Physical DesignGreat interpersonal and communication... 
    Entry level
    Daily paid
    Full time
    Work experience placement
    Work at office
    Local area
    Remote work
    Monday to Friday
    Flexible hours

    MatX

    Mountain View, CA
    18 hours ago
  • $160k - $275k

     ...availability. MatX is seeking silicon physical design engineers to join our team as we create best-in-...  ...subsystems or subsets and/or chip-level Physical Design deliverables including but...  ...8 years of industry experience in ASIC Physical Design Great interpersonal and... 
    Entry level
    Daily paid
    Full time
    Work experience placement
    Local area
    Remote work
    Monday to Friday
    Flexible hours

    MatX Inc.

    Mountain View, CA
    3 days ago
  • $125.7k - $203.1k

     ...full product development—from design to qualification to production...  ...Perform block- and full-chip-level power analysis and estimation...  ...experience. (Relevant fields include ASIC Design or Power Design.)...  ...requirements.Job SummaryJob number: 2030409Profession: Product and Engineering
    Suggested
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    4 days ago
  • $153.6k - $215k

     ...communities around the world.Come work at Amazon!We're hiring a ASIC Digital Design Engineer within a high performance ASIC design team. This team is...  ...specification to RTL to optimizing timing / power to chip level validation. · Build complex, high-performance digital... 
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    Permanent employment
    Local area
    Flexible hours

    Amazon

    San Diego, CA
    4 days ago
  • $150.4k - $277.6k

     ...technology? We are searching for a dedicated engineer to join our exciting team of problem solvers.DescriptionAs an ASIC Design Engineer, your responsibilities span various...  ...specifications for power management and other SoC level IPs- Design, implement, and debug complex... 
    Suggested
    Relocation

    Apple

    Cupertino, CA
    4 days ago
  •  ...is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs...  ...:We are seeking a highly motivated ASIC Design Engineer, PCIe IP Enablement to join our team....  ..., Physical Design team and SoC level leads.Technical and schedule discussion... 
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    AMD

    Markham, IL
    3 days ago
  • $147k - $279k

    Senior ASIC Physical Design EngineerThis role has been designed as 'Hybrid' with a requirement that...  ...an experienced ASIC Physical Design Engineer to support the development of complex,...  ...designs at both partition and full-chip levels.Create, validate, and maintain timing... 
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    Full time
    Work experience placement
    Work at office
    Local area
    Immediate start
    2 days per week

    Hewlett Packard Enterprise

    Chippewa Falls, WI
    3 days ago
  • $196k - $310.5k

    We are now looking for a Senior ASIC Floorplan Design Engineer!NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world...  .... The base salary range is 196,000 USD - 310,500 USD for Level 5, and 232,000 USD - 368,000 USD for Level 6.You will also... 
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    Full time

    Nvidia

    Santa Clara, CA
    1 day ago
  • $136k - $218.5k

    We are now looking for a Senior ASIC Engineer! NVIDIA is searching for an outstanding ASIC Engineer...  ...!What you’ll be doing:As a Senior Design Engineer at NVIDIA, you will be responsible...  ...range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for... 
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    Full time
    Worldwide

    Nvidia

    Hillsboro, OR
    4 days ago
  •  ...actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink,... 
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    Worldwide
    Weekend work

    SpaceX

    Austin, TX
    1 day ago
  • $280k

    Job title: ASIC Design Engineer, RTL (Senior/Staff/Principal)Location: San Jose, CA or Colorado Springs, CO (on-site)Salary: $280k-580k total...  ...FSA and HSA401k with 6% matchESPPFlexible/Unlimited PTOAnnual bonus from 15-30% (depending on your level)VERY generous stocks!
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    CyberCoders

    Sunnyvale, CA
    2 days ago
  • $150.4k - $277.6k

     ...Hardware Technologies group, you’ll help design our next-generation, high-performance, power...  ....DescriptionAs a Pixel IP DMA Design Engineer in the Pixel IP team, you will work closely...  ...in multimedia IP/SoC front-end ASIC RTL designTight-knit collaboration skills... 
    Suggested
    Relocation

    Apple

    Cupertino, CA
    4 days ago
  • $175k - $280k

     ...of enabling human life on Mars.SR. RTL DESIGN ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging...  ..., validation, product engineering, ASIC implementation). In this role, you will...  ...Verilog/System Verilog, integrate that in top level and deliver the fully verified,... 
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    SpaceX

    Palo Alto, CA
    4 days ago
  • VLSI ASIC Logic Design EngineerThis role has been designed as 'Hybrid' with a requirement that you...  ...and prototype fabrication.Management Level Definition:Contributions include applying...  ...member of project team of other VLSI engineers and internal and outsourced development... 
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    Work experience placement
    Work at office
    Local area
    Immediate start
    2 days per week

    Hewlett Packard Enterprise

    Bloomington, MN
    2 days ago
  • $168k - $264.5k

    We are now looking for a Senior ASIC Design Engineer to join our DFT team!NVIDIA has continuously reinvented itself over two decades. Our invention...  .... The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.You will also... 
    Full time

    Nvidia

    Santa Clara, CA
    18 hours ago
  • $136k - $218.5k

     ...lasting impact on the world. NVIDIA is looking for an Senior ASIC Design Engineer to join our Memory Subsystem Team!Whatyou'llbedoing:As a...  ...interconnects, protocol bridges, hardware-managed coherency and system level caches is a plusExperience with multiple clock domains and... 
    Full time

    Nvidia

    Santa Clara, CA
    18 hours ago
  •  ...we advance your career. THE ROLE: You will contribute to the ASIC (chip) design for high-performance network chips: AINIC and DPU. As a...  ...architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.THE PERSON:A successful... 
    Night shift

    AMD

    Santa Clara, CA
    3 days ago
  •  ...possible, with the ultimate goal of enabling human life on Mars.ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we’re leveraging our...  ...ASIC/FPGA design lifecycle for Starlink projects, from high-level conceptual and architectural discussions through microarchitecture... 
    Permanent employment
    Temporary work
    Worldwide
    Weekend work

    SpaceX

    Palo Alto, CA
    4 days ago
  • $116k - $189.75k

     ...innovative technology and dedication to excellence guide us. As an ASIC Design Engineer, you will build powerful SoC and GPU products. These...  ...ranges for this position are:116,000 USD - 189,750 USD for Level 2; and 136,000 USD - 218,500 USD for Level 3.You will also be... 
    Full time
    Work experience placement

    Nvidia

    Santa Clara, CA
    2 days ago
  • $116k - $189.75k

     ...clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...  .... The team collaborates with the front design team to understand the clocking requirements...  ...logic designUnderstanding of system level artifacts like power, noise, etcExperience... 
    Full time
    Work experience placement

    Nvidia

    Santa Clara, CA
    4 days ago
  • $200k - $290k

     ...inference.About The Role:As a senior front-end design engineer, you will be a key part of the world-...  ...set for the product.Debug silicon-level functional, timing, and power issues during...  ...is a plus.Experience managing external ASIC vendor through product development cycle... 
    Remote work

    Cerebras Systems

    Sunnyvale, CA
    18 hours ago
  • $158.5k - $321k

    Sr. ASIC Design EngineerThis role has been designed as 'Hybrid' with a requirement that you...  ...mentoring/guidance to new college-grad engineers and interns. Recommended skillsBachelor’...  ...Architecture/networking protocols through graduate level courses or prior work is a plus. Strong... 
    Full time
    Work experience placement
    Work at office
    Local area
    Immediate start
    2 days per week

    Hewlett Packard Enterprise

    Roseville, CA
    3 days ago
  • $168k - $264.5k

    NVIDIA is seeking ASIC Design Engineers with experience in agentic AI to help design and implement the world's leading SoC's and GPU's. As part...  .... The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.You will also be... 
    Full time
    Work experience placement

    Nvidia

    Santa Clara, CA
    4 days ago
  • $160k - $225k

     ..., with the ultimate goal of enabling human life on Mars.SR. ASIC DESIGN ENGINEER (STARSHIELD)Starshield leverages SpaceX’s Starlink technology...  ...the RTL in Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis/timing clean design... 
    Permanent employment
    Temporary work
    Weekend work

    SpaceX

    Hawthorne, CA
    18 hours ago
  • $163k - $236k

    Participate in the physical design of complex blocks.Contribute to the design and closure...  ...qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,...  ...within AI/ML-driven systems.As an ASIC Physical Design Engineer, you will collaborate... 
    Worldwide

    Google

    Sunnyvale, TX
    1 day ago
  • $168k - $264.5k

    NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU's. This position offers the opportunity...  .... The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.You will also... 
    Full time

    Nvidia

    Durham, NC
    3 days ago
  • $136k - $218.5k

     ...and intelligence.We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. If you...  ...of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level, with a focus on netlist... 
    Full time
    Shift work

    Nvidia

    Santa Clara, CA
    3 days ago
  • $175k - $308.5k

     ...Technologies group, you'll contribute to designing, optimizing, and manufacturing our...  ...Apple products!DescriptionAs a Cellular ASIC Design Engineer, you'll develop and optimize design...  ...design innovative products at the block/IP-level and system-level in advanced process... 
    Relocation

    Apple

    San Diego, CA
    4 days ago
  • $114k - $170k

    General InformationJob TitleASIC Digital Design Engineer (HPC IP) - 18382Job ID18382CityAustinState/ProvinceTexasDate Posted13-Aug-2026Job CategoryEngineeringJob...  ...RTL design and verification expertise to solve challenging ASIC design problems.You enjoy collaborating across engineering... 
    Worldwide

    ANSYS

    Austin, TX
    18 hours ago