Mixed SIgnal Asic Layout Engineer

Mixed Signal ASIC Layout Engineer Location: Boston, MA area (Hybrid) Length: 6-12 Month Contract Job Description: Seeking a talented and motivated individual to join the analog mixed signal team. Will be responsible for creating complex analog layouts from schematics in collaboration with other members of our team. These layouts are used in ASICs for national security, biomedical, and space applications. While we are seeking a principal level engineer, considerations will be made at all levels for particularly capable applicants. A successful candidate will assist ASIC development through creating custom analog layouts, floor planning entire chips, high level problem solving, and executing tape outs. Skills with organizing and leading other layout engineers are also highly valued. Essential Duties and Responsibilities: Design and simulate circuits at transistor-level to implement architecture and requirement specifications Contribute to system-level design Optimize hardware designs for performance, power, and cost Evaluate the hardware feasibility of complex algorithms and requirements Independently contribute to complex chip architectures and designs Independently drive solutions to complex problems – develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirements Contribute to business development and proposal activities Develop, document, and teach best practices to less experienced engineers Perform or guide physical layout, including floor‑planning, and simulate circuits using extracted parasitic, contribute to design‑for‑test development Qualifications: Requires a bachelor's degree in engineering, or related field. Master’s degree preferred. Requires 7-10 years of experience with a bachelor's degree, or 5-10 years of experience with a master’s degree in ASIC Hardware Engineering or related. Proficiency in integrated circuit design Understanding of integrated circuits, semiconductors, and general computer architecture Ability to write detailed design specifications Ability to lead multi‑disciplinary technical teams Excellent verbal and written communication skills Excellent mathematical skills. Excellent organizational skills and attention to detail Excellent time management skills with the proven ability to meet deadlines Demonstrate strong organization, planning, and time management skills to achieve program goals Preferred: Experience with low power circuit design Experience with CMOS advanced nodes below 32nm Experience with radiation‑hardened electronics

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