Hybrid ASIC/FPGA SoC Design & Verification Engineer

ASIC, FPGA, SoC - Design and Verification Engineers job at Steinman Recruiting Associates. Boston, MA. We seek electronic circuit design and verification talent who thrive on a smaller, collaborative, multi-disciplinary team. Lower volume, cutting-edge, aerospace and defense applications. Boston (inside the I95). Hybrid workplace (onsite 3 days weekly). Salaries typically $130,000-$190,000 with exceptional benefits. Relocation assistance is offered. US Citizenship with the ability to obtain and maintain a US government security clearance required. Pluses: PhD/MS with 5+ years in industry. Ability to mentor and manage small technical teams. In scope Top Secret clearance. BSEE/CE with 7+ years in industry. PhD/MS highly desirable. ASIC FPGA SoC. Below are general thumbnail descriptions of the various roles: Digital Electronics Design (Senior - Principal): Perform advanced architectures and designs for complex ASICs. Radiation hardening. Xilinx or Microchip design flow. Circuit simulation using tools such as HyperLynx or Ansys. Mentor Graphics PCB design flow. Front-end Digital Systems Design (Senior – Principal): Fluent in SystemVerilog, Verilog or VHDL and familiar with LINT. Architectures for Secure systems design. Tape-outs at advanced nodes. You will develop the architecture, designs circuits and/or HDL, performs simulations, performs physical layout, verify and test design. Analog/Mixed Signal ASIC Design (Senior – Principal): Complex chip architectures and designs. Chip-level and block-level integrated circuits. Design and simulate circuits at transistor-level. Top level design for previous tape outs. System Verilog, SV-RNM, Verilog-AMS, MATLAB, Simulink. Scripting. Electrical & Electronics Design (Senior – Principal): You will craft sophisticated electronic systems using commercial off-the-shelf FGPAs, processors, or systems on a chip (SOCs). DDR3/4 memory, PCIe, and Gbit serial interfaces. Miniature electronic packaging and design using bare die or chip-scale package. Power integrity design. Power conditioning. Siemens Designer and Layout, HyperLynx, Ansys, Spice, MATLAB. Power Electronics Design (Senior – Principal): Advanced architectures and designs for complex power electronics. Radiation hardening. Grounding, shielding and EMC design techniques. Switched-mode power conversion. Distributed power architectures. Schematic capture. PCB layout. Spice. MATLAB. Simulink. UVM Digital Verification (Senior – Principal): You will tackle novel verification challenges in FPGAs and ASICs. UVM Agents for proprietary buses. VIPs for industry standard buses. Block-level UVM. Chip-level UVM. Test-bench architectures. AMBA AXI. DDR3/DDR4. System Verilog including SVA. MATLAB. Simulink. Scripting. #J-18808-Ljbffr Feitong Buke