Sr Principal ASIC Design Engineer - Terawave

Application Close Date Applications will be accepted on an ongoing basis until the requisition is closed. About Blue Origin At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low‑cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! Blue Origin is pioneering the future of space‑based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi‑orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise‑grade connectivity for critical operations worldwide. Location This role is based at sites in San Diego, CA; Bay Area, CA; Austin, TX; Kent, WA. Job Overview We are seeking ASIC/SOC Design engineers (levels including Principal, Senior Principal) who are critical to ensuring our RFIC/ASIC designs culminate in thoroughly designed and validated cutting‑edge integrated circuits that drive Blue Origin's mission of enabling millions to live and work in space for the benefit of Earth. This role requires a highly skilled Design and Verification Engineer with extensive experience in complex SoC design, integration, and verification. The candidate will be responsible for driving end‑to‑end design and verification methodologies, from writing requirements and specifications to post‑silicon bring‑up. Strong expertise in Verilog/System Verilog, DSP structures, modem SOCs, ARM CPU integration, and interface protocols is essential, along with the ability to optimize performance and power, support back‑end teams, and ensure seamless portability across FPGA and silicon environments. Design and Verification Verilog/System Verilog experience in designing complex SOCs

CDC, RDC, LINT

Write requirements, specifications and test plans Optimize performance while keeping power low Clock gating (dynamic and static) Multi‑voltage SOC front end design Formal verification Functional coverage, definition and collection Module verification Complex subsystem verification Complex SoC verification Co‑simulation with software, integration of software build tool flow with simulation Gate simulation External IP integration ARM CPU single and multi‑core integration with bus fabric, GIC, cache, MMU, secure boot AXI bus complex High performance DMA NOC integration DDR, PCIE, Ethernet, SPI integration High speed serdes integration DSP structures (FIR, Cordic, FFT/IFFT, MAC, circular buffers, analog‑digital interface) Modem using state of the art DSP, coding, framing (phy and MAC) Sequenced and time bound data movement in DSP structures (time slots, time stamps etc) SOC top level integration using models for analog macros Verification using golden reference models in Matlab, SystemC or C Code coverage Timing constraints Support back‑end teams during DFT, LEC, floorplan, STA Post‑Silicon Post silicon bring up FPGA ASIC to/from FPGA flow Minimum Qualifications BS, MS in Electrical Engineering or a related technical discipline 15+ years of experience Deep working knowledge and hands‑on experience in innovative verification flows Base Pay Range For CA applicants: $308,051.00 - $431,270.70. WA applicants: $308,051.00 - $431,270.70. Benefits Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long term disability, 401(k) with a company match of up to 5%, and an Education Support Program. Stock Options for all regular employees (working at least 20 hours/week) Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company‑paid holidays. Dependent on role type and job level, employees may be eligible for benefits and bonuses based on the company's intent to reward individual contributions and enable them to share in the company's results, or other factors at the company's sole discretion. Bonus amounts and eligibility are not guaranteed and subject to change and cancellation. Equal Employment Opportunity Blue Origin is proud to be an Equal Opportunity/Affirmative Action Employer and is committed to attracting, retaining, and developing a highly qualified and dedicated workforce. Blue Origin hires and promotes people on the basis of their qualifications, performance, and abilities. We support the establishment and maintenance of a workplace that fosters trust, equality and teamwork. We provide all qualified applicants for employment and employees with equal opportunities for hire, promotion, and other terms and conditions of employment, regardless of their race, color, religion, sex, sexual orientation, gender identity, national origin/ethnicity, age, physical or mental disability, genetic factors, military/veteran status, or any other status or characteristic protected by federal, state, and/or local law. Blue Origin will consider for employment qualified applicants with criminal histories in a manner consistent with applicable federal, state, and local laws. Affirmative Action and Disability Accommodation Applicants wishing to receive information on Blue Origin’s affirmative action plans, or applicants requiring a reasonable accommodation in order to participate in the application and interview process, please contact us at View email address on click.appcast.io. Please note this is a publicly managed inbox. Please do not include any personal medical information in your request. #J-18808-Ljbffr Blue Origin