Signal Integrity Design Engineer

Responsibilities Simulate ultra high-speed PCB channels (112G+ SerDes rates) including connectors, breakouts, and via structures Provide signal integrity guidance to Digital Hardware Designers using simulated and empirical results Help design PCB test boards to corroborate simulations Qualifications Minimum B.Sc or B.Eng in Electrical Engineering or Computer Engineering 10+ years of experience simulating high-speed SerDes in PCB applications Expert in using Ansys HFSS or Dassault CST simulation tools Hands‑on measurement skills with TDR/VNA equipment and oscilloscopes Excellent interpersonal and communication skills Nice to have Familiarity with Mentor Hyperlynx, HSpice, and Cadence Allegro Knowledge of PAM4 transmitter and receiver analog and digital technologies: FIR, CTLE, DFE, & FEC Experience in the theoretical aspects of EMC/EMI and ITU/IEEE/Bellcore telecommunications standards Programming/Scripting ability (C/Python/Matlab) We act inclusively and respect the uniqueness of people. Our employment decisions are made regardless of race, color, national or ethnic origin, religion, gender, sexual orientation, gender identity or expression, age, marital status, disability, protected veteran status or other characteristics protected by law. We are committed to a culture of inclusion built upon our core value of respect. If you're interested in this role but don't meet every listed requirement, we still encourage you to apply. Unique backgrounds, perspectives, and experiences enrich our teams, and you may be just the right candidate for this or another opportunity. The length of the recruitment process may vary depending on the specific role's requirements. We strive to ensure a smooth and inclusive experience for all candidates. Discover more about the recruitment process at Nokia. #J-18808-Ljbffr NOKIA