Senior Analog Layout Engineer - High-Speed CMOS 7nm
Saksoft
Saksoft is seeking an Analog Layout Engineer in Cupertino, CA for a long-term contract role. You will lead the layout of analog ICs for high-speed applications in advanced CMOS FinFET technologies and oversee floor planning, routing, and top-level assembly to ensure optimal performance. The ideal candidate brings 6+ years of analog layout experience, with deep knowledge of Cadence, Mentor, and Synopsys tools and hands-on work on transceivers, drivers, data converters, and PLLs. #J-18808-Ljbffr Saksoft
Vacancy posted 1 day ago
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