SoC UPF Methodology Engineer
Apple Inc.
Are you passionate about crafting solutions to intricate challenges? Join the Low Power group at Silicon Technologies and contribute to the development of cutting‑edge technology and capabilities for low‑power chip design. Your work will fuel Apple’s next-generation chips! You’ll play a crucial role in exploring AI/ML to design the workflow for the next generation of UPF. Additionally, you’ll refine our existing UPF framework and ensure its seamless integration and rigorous verification across our mobile products. You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Power UPF Engineers, who will drive transistor level power ERC sign‑off and power intent‑UPF implementation & verification on mobile SOCs. Description In this role, your main objective will be to enhance our Unified Power Format (UPF) methodologies, refining power intent specification, execution, and validation to support state‑of‑the‑art mobile SOCs. Enhancing power intent coverage via advanced static and dynamic verification techniques. Developing tailored UPF solutions to align with unique project requirements. Overseeing UPF deployment and sign‑off for frontend (FE) and place‑and‑route (P&R) stages. Conducting thorough power intent assessments on custom circuitry. Partnering with design and verification teams to troubleshoot and fix UPF‑related workflow challenges. Integrating AI/ML technologies to optimize UPF processes and methodologies. Minimum Qualifications A minimum of a bachelor’s degree in a relevant field and a minimum of 3 years of relevant industry experience. Preferred Qualifications Expertise in UPF implementation and verification. Proficiency in scripting with languages like Python and Tcl. Understanding of CMOS power design principles. Experience applying AI/ML to coding and workflow optimization. Knowledge of multi‑voltage static verification tools (e.g., VSILP/VCLP, CLP). Familiarity with the complete RTL‑to‑GDSII design flow. Strong communication abilities for effective collaboration across multidisciplinary teams. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. Apple accepts applications to this posting on an ongoing basis. #J-18808-Ljbffr Apple Inc.
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$143.15k - $265.85k
Staff Digital Design Engineer - SOC Low Power, Clocking & Integration page is loaded## Staff... ...power sequencing.* Develop and integrate UPF/CPF-based power intent across subsystem... ...experience with low-power design methodologies, including UPF, power gating, retention...SuggestedFlexible hoursShift work- ...goal of enabling human life on Mars.ASIC/SOC DFT ENGINEER (SILICON ENGINEERING)At SpaceX we’re... ...EXPERIENCE:Understanding of ASIC design flow, methodologies, physical design, and... ...using Verilog/SystemVerilogFamiliar with UPF (unified power format), formal verification...SuggestedPermanent employmentWorldwideWeekend work
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...lasting impact on the world.NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions! We... ...and UVM, along with a solid grasp of ASIC verification methodologies.What you'll be doing:Responsible for ASIC design...Full timeNight shift- Job Overview:Arm’s Solution Engineering team is very thrilled to work with SoC verification engineers in Austin! New team members in Austin will join hands... ...to developing and improving the verification methodologies used by the team.In addition, you'll work closely with...Work at officeLocal areaWork from home
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...seeking a highly experienced a Director, SoC Design Engineering, to lead the functional verification... ...scalable and reusable verification methodologies that ensure first-pass silicon success... ...Familiarity with power intent verification (UPF) and security verification techniques....Full timeWork experience placementLocal areaImmediate startWorldwideShift workNight shift$168k - $264.5k
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...experienced pre-silicon verification engineers who are passionate about... ...and scale verification methodologies spanning software, RTL, and emulation... ...validation experience in SoC accelerators or custom ASIC... ...Experience with DFX, low power and UPF verification techniques.Job...Full timeLocal areaImmediate startShift work$144.6k - $263.8k
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