Package Design Methodology Engineer

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.NVIDIA's Advanced Package Engineering team sits at the intersection of cutting-edge chip design and the physical reality of getting silicon to product — and we're expanding it. As AI systems grow more complex, NVIDIA's multi-die packages have become some of the most challenging engineered products, connecting dozens of chiplets across substrates, interposers, and heterogeneous interfaces. The engineers who build the automation infrastructure for these packages don't just write software — they directly determine whether NVIDIA can tape out on schedule and at scale. This role is a rare opportunity to craft production-grade EDA tooling that operates at the bleeding edge of packaging technology, where no commercial solution exists yet and the problems you solve become the new industry baseline. If you want develop design flows for NVIDIA's next-generation AI and HPC platform packages, this is that job.What you'll be doing:Work with world-class engineers to design and implement VLSI tools for silicon and substrate design.Develop applications to enable project engineers with an emphasis on maintainability and ease of use.Develop flows/tools and methodologies to construct, analyze, and validate package designs at many different stages in the production flow.Optimize the daily workflows of the world's top package designers.What we need to see:BS in Computer Science, Electrical Engineering, or a related field (or equivalent experience), and 5+ years of flow and methodology development experience building flows for package design used by engineering teams at scale.Good programming fundamentals in Python and/or C++, including proficiency with data structures, algorithms, object-oriented design, and code quality practices.Demonstrated experience applying AI/ML techniques in engineering workflows — this could include using LLMs for code generation and debugging, building ML-assisted design analysis tools, or integrating AI-assisted flows into EDA environments.Strong understanding of electrical engineering fundamentals relevant to VLSI package design (signal integrity, power delivery, parasitic extraction, or equivalent).Ways to stand out from the crowd:Good understanding of VLSI package design along with interposer and IC physical design.Strong expertise in developing package design flows and methodologies.NVIDIA is widely considered to be the leader of AI computing, and one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you.Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until October 3, 2026.This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Santa Clara; US, TX, Austin; US, CA, RemoteType: Full time