DMTS NOC Cache Coherency Architect
$166.5k - $290kMIPS Holding Inc
About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit Summary of Role: MIPS - A GlobalFoundries company is seeking a highly experienced NOC and Cache Coherency Architect with over 15 years of industry experience to lead design efforts focused specifically on NOC, Coherency Manager and Cache Controller components. The successful candidate will have extensive hands‑on experience utilizing advanced design methodologies. This senior role involves close collaboration with CPU core architects, designers, and cross‑functional global teams to ensure high‑quality, high‑performance processor designs. Essential Responsibilities: Lead and drive architectural specification and design activities for Coherency Manager and Cache Controller IP to closure. Collaborate closely with design teams and architects to thoroughly understand and interpret microarchitectural and functional specifications. Automate and optimize verification flows and regression environments using scripting languages like Python, Perl, TCL, or Shell. Mentor design engineers, providing technical guidance and leadership within the verification team. Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications: Master’s degree or higher in Electronics/Electrical/Computer Engineering. 15+ years of relevant verification experience, specifically in CPU or complex SoC verification. Proven expertise in Multicore and Multicluster Coherency, Cache Controllers, or similar blocks. Proficiency in SystemVerilog, Verilog, C/C++, and Assembly. Solid understanding of interconnect and coherency protocols such as AXI, ACE, OCP, CHI. Strong scripting skills in Python, Perl, TCL, or Shell. Experience with CPU architectures, particularly RISC‑V, ARM, or MIPS. Preferred Qualifications: Experience with RISC‑V architecture. Familiarity with functional safety standards (e.g., ISO 26262). Prior exposure to FPGA prototyping and emulation platforms. What MIPS Offers: Opportunity to be part of a dynamic team creating industry‑leading RISC‑V processors. Autonomy with extensive support from industry experts. Opportunities for significant career growth and technical advancement. Competitive compensation and comprehensive benefits package. Expected Salary Range $166,500.00 - $290,000.00 The exact Salary will be determined based on qualifications, experience and location. If you need a reasonable accommodation for any part of the employment process, please contact us by email at View email address on click.appcast.io and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case‑by‑case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address. An offer with GlobalFoundries is conditioned upon the successful completion of pre‑employment conditions, as applicable, and subject to applicable laws and regulations. GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory. All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law. We shape what's essential At GlobalFoundries you will find a vibrant work environment where collaboration and innovation thrive. Our diverse and global team shares a culture of respect and inclusivity, representing the best in the industry. We celebrate success together and are united by our dedication to excellence and our desire to improve and empower the world. #J-18808-Ljbffr MIPS Holding Inc
$152k - $241.5k
We are seeking an experienced Senior Cache Coherency Architect to join our ambitious team at NVIDIA. This opportunity allows you to be part of a world... ..., build, verification, and integration into the NoC fabric to ensure cache-coherency compliance.Collaborate with...Night shiftFull time- GlobalFoundries, a leader in semiconductor manufacturing, seeks a NOC and Cache Coherency Architect with 15+ years of expertise to drive design and verification of Coherency Manager and Cache Controller IP. Collaboration with CPU core teams will be essential to ensure high...Night shift
$100k
...general-purpose workloads. As a Performance Architect on our Platform Architecture team, you’... ...software stacks, compilers, CPU design, cache coherency protocols, and interconnect fabrics to... ...EE, ECE, CE, or CSDeep understanding of NoC topologies, routing algorithms, QoS, and...Night shiftPermanent employment$152k - $241.5k
...skilled Performance Modeling Architect to lead the architectural definition... ...of our next-generation CPU Cache Hierarchies and interconnects.... ...caches (L3/System Cache) and coherent fabrics achieve ambitious... ...Understanding of Network-on-Chip (NoC) topologies (Mesh, Ring, Torus...Night shiftFull time$211k - $356k
...centers. We are a dynamic group of system architects, packaging technology developers, and... ..., including core/instance counts, cache hierarchies, coherent interconnects, and memory subsystems.... ...5/HBM controllers, Network-on-Chip/NoC, and security enclaves).• PPA Optimization...Night shiftTemporary work$211k - $356k
...are a dynamic group of system architects, packaging technology... ...integrate seamlessly with the coherent interconnect, memory hierarchy... ...(e.g., AMBA CHI, proprietary NoC) and memory subsystem. Manage... .../CHI), memory hierarchy, and caching protocols.• Virtualization: Solid...Night shiftTemporary work$211k - $356k
...are a dynamic group of system architects, packaging technology... ...memory subsystems, interconnects (NoC), and high-speed I/O (PCIe/CXL... ...architectural design sweeps to optimize cache sizes, memory bandwidth,... ...of memory hierarchies, cache coherency protocols (e.g., MESI, MOESI)...Night shiftTemporary work$221.7k - $364.8k
...the world. Come build with us!Role and ResponsibilitiesAs a Principal Micro-architect, you will lead the microarchitecture development of custom coherent interconnect IP and/or last-level cache (LLC) blocks for next-generation designs. In this role, you will drive key aspects...Hourly payFull timeRelocation$151k - $251.8k
...world. Come build with us!Role and ResponsibilitiesAs a Micro-Architect/Logic Designer, you will be responsible for leading the micro-architecture development of custom coherent interconnect IP and last level cache blocks. In this role you will be interacting with the...Hourly payFull timeRelocation$242.3k - $363.5k
...-edge technology work! As a SoC Performance Architect, you will create performance and power models for the fabric NoC / DRAM controller / IO blocks for server-class... ...of interconnects, traffic QoS, distributed caches, coherency flows, DRAM controller and IO (PCIe) flows...Night shiftWork experience placementWork from home$200k - $250k
Job Title: Performance Modeling Architect - AI Memory SystemsJob Location: Santa Clara, CA,... ...Expansion (NICs, SmartNICs, CXL, IPU/DPU, NoC), Memory Systems Architecture, ML Systems... ...Understanding of ML systems: workload sharding, KV caching hierarchies, attention optimizations,...Night shift$142.8k - $274.8k
...We are looking for a Principal Silicon Architect to join the team. #SCHIE... ...and specification of Network-on-Chip (NoC), memory/interconnect subsystems for high... ...design of IPs and SoCs. Experience in caches and cache coherency Experience with SOC used in data center...Night shiftOngoing contractPermanent employmentWork at officeLocal areaWorldwide3 days per week- Job Overview:At Arm an SoC Architect is a technical role responsible for architecting and designing high... ...compute architectures, power management, clocking, coherent and non-coherent interconnect, PCIe/CXL, multi-level caching architecture, functional profiling & debug,...Work at officeLocal area
- ...DescriptionWe are looking for a world-class Memory Subsystem Architect to join our SoC team at Baidu’s Sunnyvale office. The... ...evaluate the architectural design choices in SoC fabrics, system caches, system coherency, and MMUs.Work with software and SoC design team to define...Work at office
$272k - $431.25k
NVIDIA is seeking a Principal SoC Architect to join our architecture team and drive the next generation of Edge AI, Robotics, and Autonomous... ...Subsystems: Multimedia/vision accelerator pipelines, CPU/GPU cache coherency, Virtualization, and Hardware Security.Deterministic & Real-...Full time$124k - $208.4k
...ResponsibilitiesWe are seeking a talented CPU Micro-architect to join our team, where you will play a... ..., branch prediction, prefetching, and cache/TLB hierarchy.Work with the performance... ...superscalar design, cache hierarchies, coherency, and multi-core systems.Strong...Hourly payFull timeRelocation$200k - $300k
Job Title: Principal ASIC Architect - Memory Systems & AI InterconnectsJob Location: Santa... ...architectures for AI accelerators, including coherent and non-coherent fabrics, memory pooling... ...), memory controller architecture, cache coherency and memory consistency models....$100k
...seniorities.Tenstorrent is looking for a CPU Cluster Performance Architect to help shape the performance and scalability of our next... ...how multiple CPU cores work together as a cluster — from cache hierarchies and coherent interconnects, to memory bandwidth and overall system...Permanent employment- Job Overview:At Arm, the High-Speed I/O Architect defines and designs innovative on-chip interconnect architectures-coherent and non-coherent-for scalable SoC platforms. You... ...experience with coherency protocols, hierarchical cache design, and system-level coherency...Work at officeLocal areaShift work
$124k - $208.4k
...and ResponsibilitiesAs a SoC Performance Architect, you will primarily be responsible for... ...architecture and memory subsystem design including caches, interconnects and memory... ...Architecture team at SARC/ACL designs proprietary coherent interconnects and memory controllers...Hourly payFull timeRelocation$211k - $356k
...DescriptionJob DescriptionMediaTek is seeking a Compute Subsystem Architect to define and build capabilityin this space ahead of... ...core configuration, CMN topology and parameterization,cache/SLC architecture, and CHI coherency behavior. The role also providesarchitectural guidance...Temporary work$175k - $350k
...We are seeking a SoC Architect to define and drive the architecture of next‑generation XPUs... ...with memory architectures (DDR, HBM, cache hierarchies). Familiarity with chiplet... ...advanced packaging (2.5D/3D). Knowledge of coherency protocols (CXL, CHI). Experience with...$175k - $350k
...SoC Architect TylSemi, Inc. San Jose, California, United States About this position... ...Preferred Qualifications Knowledge of coherency protocols (CXL, CHI.) Experience with... ...Experience with memory architectures (DDR, HBM, cache hierarchies) Familiarity with chiplet...Remote work$126.7k - $217.9k
...systems Analysis of current accelerator and GPU architectures Architect enhancements required for efficient training of AI models Design... ...Compute near memory Scale-Out and Scale-Up Architectures Switches, NoCs, Codesign with Communication Collectives Optimized for Power...Night shiftWork experience placementWork from homeFlexible hours- ...ML Accelerator product. As an AI/ML ASIC Architect you will help drive new architecture initiatives... ...ASICs such as HBM, PCIe/UCIe/CXL, NoC, DMA, Firmware Interactions, NAND, xPU, fabrics... ...modalities (text, vision, speech) KV cache optimization, Flash Attention, Mixture of...Night shiftFlexible hours
$184k - $287.5k
We are now looking for a Senior Deep Learning Computer Architect! NVIDIA is seeking architects like you to help design hardware accelerator and processor architectures that enable state of the art machine learning and data analytics algorithms and applications on our next...Night shiftFull time$100k
...systems, and software. We are looking for a CPU Performance Modeling Architect to help evaluate, shape, and optimize the performance of future... ...such as pipelines, execution, scheduling, branch prediction, caches, memory hierarchy, and data movement.Demonstrated experience...Permanent employment- ...JSON/XML, Linux, Shell Scripting.• Must have extensive experience with NoSQL database experience, including Mongodb and Cassandra, Caching technologies (such as Redis and memcached)• Expertise in design of complex distributed systems utilizing underlying services (generally...
$272k - $431.25k
...Principal Architect For AI Systems CommunicationAn applied research team within NVIDIA's Networking Systems & Software Architecture group... ...in communication runtimes for large-scale AI workloads (KV cache transfer, disaggregated prefill/decode, model parallelism).Integrating...- ...concurrency enterprise environments. Query optimization across Trino, StarRocks, and Snowflake . Hyper extract optimization, caching, Backgrounder scheduling, and bottleneck analysis. Security & Compliance Dynamic Row-Level Security (RLS) and Column-Level...Full time
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