RISC-V CPU IP Design & Verification Intern
MIPS Holding Inc
GlobalFoundries is seeking an undergraduate intern to join the MIPS CPU IP Engineering group for hands-on experience in designing and verifying RISC‑V processor IP. You will collaborate with CPU architects, RTL designers, and verification engineers on microarchitecture, RTL implementation, and debugging across Austin, TX or Santa Clara, CA. The role emphasizes Python/C/C++ scripting, design automation, and performance analysis, with mentorship and professional development throughout the #J-18808-Ljbffr MIPS Holding Inc
Vacancy posted 1 day ago
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