Lead, High-Speed ASIC Packaging & SI/PI Design
Jobleads-US
Cisco Silicon One in California is seeking a Signal and Power Integrity Technical Lead to define, design, and verify ASIC packaging for high-performance platforms. You will develop design rules for ultra-high-speed signaling, assess SI/PI, and guide layout teams to optimize interposers, substrates, and PCBs.
You’ll lead architecture discussions, mentor junior engineers, and drive post-layout extraction and reporting to meet tight performance and reliability targets.
#J-18808-Ljbffr Jobleads-USVacancy posted 12 hours ago
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