Experienced FPGA Design Engineer Verilog & Timing Expert

INTELLECTT INC

Intellectt Inc. in Raleigh, NC seeks an experienced FPGA Engineer with 5-7 years of hands-on design expertise. You will work on Verilog RTL, timing closure, and clock architecture while using tools like Vivado, Quartus, Libero, and Questa/ModelSim. Bring-up and debugging on FPGA hardware are required. Applicants should be proficient in CDC, reset design, pipelining, FIFOs, and memory synchronization, contributing to robust, high-performance digital systems. #J-18808-Ljbffr

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Vacancy posted 5 days ago

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