DFT Engineer - RTL, Debug & Pattern Gen Expert
Sintegra Inc.
Sintegra Inc. is seeking a highly skilled CAD Engineer specializing in Design-for-Test (DFT) in Santa Clara, California. The successful candidate will design and optimize DFT flows for complex products, implementing and optimizing scan insertion flows, performing coverage loss analysis, and collaborating on silicon debug and diagnostic platforms. This role requires expert-level proficiency with Spyglass DFT and significant experience with Mentor Tessent. Strong scripting skills in Python and Tcl are also essential. #J-18808-Ljbffr Sintegra Inc.
- ...a highly skilled CAD Engineer specializing in Design-for-Test (DFT) to collaborate with global... ...flows at the RTL level. Creating SiliconInsight-based pattern generation, test bring-up, debug, and silicon characterization... ...Skills & Experience Expert-level proficiency with...Suggested
- Intelliswift - An LTTS Company is looking for a skilled professional to handle responsibilities related to DFT tools. You will work with the Siemens suite for DFT insertion, MBIST Repair Implementation, and verification of features like Boundary Scan and JTAG. The role...Suggested
$181.1k - $318.4k
...United States Apple's Silicon Engineering Group (SEG) designs high-... ...cache subsystem architecture and RTL development for multi-processor... ...with simulators and waveform debugging process Preferred Qualifications... ...policies, debug capabilities, DFT strategies, error detection...SuggestedRelocation$160k - $220k
...take the craft seriously. DFT Verification Engineer What We Need An experienced... ...Develop, implement, and maintain RTL verification environments... ...cases Assist in verifying ATPG patterns, especially at SOC level,... ...Analyze simulation results, debug complex verification and...SuggestedRemote work$142.2k - $213.4k
...Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU... ...Engineering General Summary: As a DFT Engineer you will work with... ...the DFT and DFD (Design for Debug) architecture, implementation,... ...techniques include JTAG, ATPG, test pattern translation, yield learning,...SuggestedWork experience placementWork from home- ...5+ years of hands‑on experience in DFT and ATPG for SoC or ASIC designs Strong... ...testing Proven expertise in ATPG pattern generation, analysis, and debugging Experience with MBIST, including... ...Strong grasp of digital design and RTL fundamentals Experience with industry...
$142.2k - $213.4k
A leading tech company is seeking a DFT Engineer to work closely with chip architects and designers on mixed signal and digital VLSI designs. The role involves creating test vectors, validating DFT requirements, and ensuring high test coverage. Ideal candidates will have...$142.2k - $213.4k
...Technologies, Inc. Job Area: Engineering Group, Engineering Group... ...Engineering General Summary: As a DFT Engineer you will work with... ...the DFT and DFD (Design for Debug) architecture, implementation,... ...include JTAG, ATPG, test pattern translation, yield learning, logic...Work experience placementWork from home$147.4k - $272.1k
...our processor verification team focusing on DFT verification. In this highly visible role,... ...Work closely with architecture, RTL designers, and DFT designers on verifying... ...testbenches and tests according to test plans Debug simulation failures Develop coverage monitors...Relocation$120k - $220k
...We are seeking a Senior Design-for-Test (DFT) Engineer to join our SoC design team. In this... ...lifecycle: verification, coverage analysis, pattern generation, and ATE bring-up • Perform... ...of digital design fundamentals and RTL design practices • Passion for mentoring...Full timeWork at officeImmediate startVisa sponsorshipNight shift$181.1k - $318.4k
A leading technology company in Sunnyvale seeks an RFIC Design Engineer to innovate in transceiver design. You will collaborate with teams to debug and test RF systems, ensuring top performance. A BS and significant experience in RF systems are required. The role offers...$141.8k - $258.6k
...searching for a hard‑working engineer to join our exciting team of... ...Working with designers to verify DFT implementation and run... ...advised/constrained random tests. Debugging failures, running gate level... ...test engineers to bring up test patterns on silicon. Minimum...Relocation$198.7k - $298.1k
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU... ...engineer who thrives at the intersection of RTL design and CAD automation. This role is ideal... ...solutions to streamline design and debug processes. You’ll work closely with CPU design...Work experience placementWork from home- Role Purpose We are hiring a DFT Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan. Job Details Job title: DFT Engineer... ..., JTAG) Support DFT architecture and chip-level integration Debug DFT issues and improve test coverage Requirements Experience...
$198.7k - $298.1k
...Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group CPU... ...hiring talented engineers for RISCV CPU RTL development targeting high-performance, low... ...architecture, Power management architecture, Debug and trace architecture. Required for...Work experience placementWork from home$2,000 per month
...investors and staffed by leading engineers, Etched is redefining the... ...motivated Design For Testability (DFT) Engineer to join our dynamic... ...to enhance test coverage, debug capability, and fault isolation... ...Generate production-quality test patterns and ensure robust failure...Work at officeRelocation package$158.76k - $194.04k
...Santa Clara, California is seeking a Hardware Design Engineer responsible for designing and enhancing debug, trace, and profiling IP for RISC-V processors. This... .../PhD in a technical discipline, and proficiency in RTL design languages. A competitive benefits package is...$138k - $198k
...The successful candidate will have a strong background in ASIC RTL design and responsibilities include creating micro-architecture... ...products. Applicants should hold a Bachelor’s degree in Electrical Engineering or a related field and possess a minimum of 2 years of relevant...$116k - $166k
...qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,... ...experience. 1 year of experience in RTL design. Experience with digital design... ...Verification team to develop test plans, debug RTL, and ensure functional correctness. Support...Worldwide$100k - $189.75k
NVIDIA Gruppe is seeking a talented engineer to develop behavioral models and verification for mixed signal designs used in... ...Computer Engineering, along with hands-on experience in RTL simulation or waveform debug. The base salary ranges from 100,000 USD to 189,750 USD depending...$120k - $200k
...MatX is seeking a Silicon Design‑For‑Test (DFT) engineer to join our team as we create best‑in‑... ...control signals, and develop robust pattern porting flows from IP‑level to SoC‑level... ...register initialization sequences, and debug support during test program development....Full timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours- Hewlett Packard Enterprise Development LP is seeking a Signal Integrity Engineer in Sunnyvale, California. This position emphasizes collaborating with an experienced team to perform high-speed ASIC design and analysis for cutting-edge networking products. Ideal candidates...
- A leading tech company in Santa Clara is seeking a GPU Clocking Engineer to design and manufacture high-performance, power-efficient processors. The ideal candidate will have a minimum of 10 years of relevant experience in ASIC integration and expertise in clock distribution...
- A technology company is looking for a Signals Integrity Engineer in Santa Clara, CA, or Austin, TX. The ideal candidate has 5+ years in high-speed digital design and a Bachelor’s degree in Electrical Engineering. Responsibilities include designing complex breakout structures...
- ...streams. Position Responsibilities: Logic Design to support DFT features Automate DFT Flows (Scan, Compression & MBIST) used... ...Minimum Requirements: MSEE in Electrical / Computer Engineering Knowledge of DFT fundamentals Knowledge of Logic design &...Internship
$160k - $220k
A stealth-mode startup in California is seeking an experienced DFT Verification Engineer to ensure the functionality and quality of ASIC DFT logic. This role involves building verification environments, executing coverage plans, and collaborating with design engineers....- A leading technology company is looking for an RF Hardware Engineer for their Cupertino office. You will be responsible for ensuring... ...Engineering and over 10 years of experience in RF design and debugging. The role requires hands-on analysis using specialized laboratory...Work at office
- NVIDIA is seeking a Senior System Debug Engineer to join its datacenter product engineering team in Santa Clara, California. The role involves... ...Product Introduction phase while collaborating with industry experts. The ideal candidate will have over 12 years of experience...
$110k - $145k
...lifecycle—such as DRC/CDC/STA debug, regression triage, PPA convergence... ...workflows, spanning RTL‑to‑GDS, signoff, debug, and regression... ...BS or MS in Electrical Engineering, Computer Science, or equivalent... ...layout, DRC/LVS, STA, power, CDC, DFT, simulation/regressions)...$126.8k - $190.9k
A leading technology company is seeking a CPU Microarchitect/RTL Engineer in Santa Clara, CA. This role involves developing micro-architecture, owning RTL design, and supporting verification teams. Candidates should have experience with Verilog or VHDL and a strong background...
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