Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

RTL Design Engineer, Silicon

$138k - $197k

Google

Define microarchitecture for a subsystem.Integrate internal and/or external IP.Define microarchitecture of a small to medium size IP.Perform RTL coding, function/performance simulation debug and Lint/CDC/FV/UPF checks.Participate in test plan and coverage analysis of the sub-system and chip-level verification.Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.4 years of experience with IP development or integration.Experience in ASIC development withVerilogor VHDL.Experience with a scripting language like Perl or Python.Preferred qualifications:Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.Experience with ASIC design methodologies for clock domain checks, reset checks and low power design.Knowledge of one of these areas: processor cores, buses/fabric/NoC, debug/trace, interrupts, clocks/reset.Knowledge of high-performance and energy efficient design techniques.Knowledge of FPGA and emulation platforms.Knowledge of ASIC Verification or DFT.Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $138000 - $197000 (USD) + 15% bonus target + equity + benefitsLearn more about benefits at Google.Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.4 years of experience with IP development or integration.Experience in ASIC development withVerilogor VHDL.Experience with a scripting language like Perl or Python.

Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the RTL Design Engineer, Silicon in Mountain View, CA vacancy
  • $175k - $280k

     ...is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.SR. RTL DESIGN ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s... 
    Suggested
    Permanent employment
    Temporary work
    Worldwide
    Weekend work

    SpaceX

    Palo Alto, CA
    2 days ago
  • Google in Mountain View, CA is seeking a Mid-level RTL Design Engineer to drive micro-architecture definition and IP integration for an ASIC...  ...and contribute to synthesis, timing, and power closure for silicon bring-up. The role requires 5+ years in RTL design, IP integration... 
    Suggested

    Google

    Mountain View, CA
    3 days ago
  • AMD, in Santa Clara, CA, is seeking a Silicon Design Engineer to research, design, develop, and test electronic components and systems for semiconductor manufacturing. The role involves architecture and RTL design, system simulation, and documentation for ASIC development... 
    Suggested

    AMD

    Santa Clara, CA
    2 days ago
  • $119.8k - $234.7k

     ...Hardware EngineeringDiscipline: Silicon EngineeringCompany:...  ...Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft...  ...within SCHIE is responsible for design, development, manufacturing...  ...additional custom FPGA RTL for protocol interfaces and feature... 
    Suggested
    Ongoing contract
    Permanent employment
    Work at office
    Local area
    Worldwide
    3 days per week

    Microsoft

    Mountain View, CA
    1 day ago
  • $163k - $237k

     ...environments for digital logic at RTL using SystemVerilog and...  ...Bachelor's degree in Electrical Engineering, Computer Engineering,...  ...subsystems.Experience working with design verification (DV) testbenches...  ..., developing custom silicon solutions that power the future... 
    Suggested
    Worldwide

    Google

    Mountain View, CA
    4 days ago
  • $163k - $236k

     ...ownership of quality from HLS code to generated RTL.Design and maintain advanced environments,...  ...for verifiability and mentor junior engineers on the nuances of HLS verification.Minimum...  ...pushes boundaries, developing custom silicon solutions that power the future of Google... 
    Worldwide

    Google

    Mountain View, CA
    2 days ago
  • $163k - $236k

     ...management and control subsystem's design microarchitecture specifications.Develop SystemVerilog RTL to implement logic for ASIC...  ...'s degree in Electrical Engineering, Computer Engineering, Computer...  ...boundaries, developing custom silicon solutions that power the future... 
    Worldwide

    Google

    Sunnyvale, CA
    1 day ago
  • $120k - $250k

     ...years ahead in AI quality and availability. MatX is seeking silicon physical design engineers to join our team as we create best-in-class silicon for...  ...solution across block, subsystem, and fullchip designs from RTL to GDSIIOwn entire subsystems or subsets and/or chip-level... 
    Full time
    Work experience placement
    Local area
    Remote work
    Monday to Friday
    Flexible hours

    MatX

    Mountain View, CA
    1 day ago
  • $138k - $198k

     ...review clock control subsystem's design micro-architecture specifications.Develop SystemVerilog RTL to implement logic for ASIC...  ...Bachelor's degree in Electrical Engineering, Computer Engineering,...  ...boundaries, developing custom silicon solutions that power the future... 
    Worldwide

    Google

    Sunnyvale, CA
    4 days ago
  • $138k - $197k

     ...Develop, implement, and maintain design blocks or components/part of...  ...Engage with Verification and Silicon Validation teams to ensure...  ...Bachelor's degree in Electrical Engineering, Computer Engineering,...  ...digital logic design principles, RTL design concepts, and languages... 
    Worldwide

    Google

    Mountain View, CA
    1 day ago
  • $116k - $166k

    Participate in the Physical Design (PD) of blocks for complex TPU...  ...subchip and individual blocks from RTL-to-GDS.Collaborate with RTL/...  ...tests, and documentation of silicon deliverables for the purpose...  ...'s degree in Electrical Engineering, Computer Engineering, Computer... 
    Worldwide

    Google

    Sunnyvale, CA
    9 hours ago
  • $163k - $237k

     ...developing CPU cache subsystems, focusing on RTL design and microarchitecture for future CPU...  ...:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science...  ...that pushes boundaries, developing custom silicon solutions that power the future of Google... 
    Worldwide

    Google

    Mountain View, CA
    1 day ago
  • $163k - $236k

     ...Machine Learning IPs for Google Silicon SoCs.Define microarchitecture...  ...Subsystem Development.Drive RTL development, debug functional...  ...'s degree in Electrical Engineering, Computer Engineering, Computer...  ...years of experience with RTL design using Verilog/System Verilog... 
    Worldwide

    Google

    Mountain View, CA
    4 days ago
  • $163k - $236k

     ...microarchitecture specifications for silicon subsystems and small to medium...  ...into complex silicon designs and multi-component subsystems.Execute production-grade RTL coding, debug intricate function...  ...multi-disciplinary and multi-site engineering groups to resolve... 
    Worldwide
    Night shift

    Google

    Mountain View, CA
    2 days ago
  • $163k - $236k

    Partner with architecture, RTL, and DFT teams to optimize power...  ...block and IP-level physical design implementations from synthesis...  ...'s degree in Electrical Engineering, Computer Engineering, Computer...  ...boundaries, developing custom silicon solutions that power the future... 
    Worldwide

    Google

    Mountain View, CA
    1 day ago
  • $142.8k - $274.8k

     ...Hardware EngineeringDiscipline: Silicon EngineeringCompany:...  ...Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft...  ...within SCHIE is responsible for design, development, manufacturing...  ...(such as HAPS or Xilinx), RTL design for FPGA or emulation,... 
    Ongoing contract
    Permanent employment
    Work at office
    Local area
    Worldwide
    3 days per week

    Microsoft

    Mountain View, CA
    1 day ago
  • $120k - $225k

     ...Rtl Design Engineer We're hiring experienced RTL Design Engineers from junior to senior levels to play a key role in designing and implementing...  ...transforming our custom dataflow architecture into working silicon. RTL engineers take ownership of microarchitecture and RTL... 

    Mythic

    Palo Alto, CA
    5 days ago
  • $155k - $210k

     ...the ultimate goal of enabling human life on Mars.PHYSICAL DESIGN ENGINEER II (SILICON ENGINEERING)At SpaceX we’re leveraging our experience in building...  ...develop timing, power and area design targets, and explore RTL/design tradeoffsResolve design/timing/congestion and flow... 
    Permanent employment
    Temporary work
    Worldwide
    Weekend work

    SpaceX

    Palo Alto, CA
    9 hours ago
  • $138k - $197k

     ...developing improvements in overall design.Design and document one or more...  ...'s degree in electrical engineering, computer engineering, computer...  ...years of experience with custom silicon design (e.g., SoCs, ASICs, etc.).Experience with RTL design using Verilog or SystemVerilog... 
    Worldwide

    Google

    Sunnyvale, CA
    1 day ago
  • $138k - $197k

     ...performant, and power-efficient RTL code primarily in...  ...functional correctness.Support post-silicon validation and debugging efforts...  ...enhancement of internal design tools, flows, and methodologies...  ...Bachelor's degree in Electrical Engineering, Computer Engineering,... 
    Worldwide

    Google

    Sunnyvale, CA
    9 hours ago
  • $156k - $229k

    TPU Design Engineer, Silicon Google - Mountain View, CA, USA; San Diego, CA, USA Mid Experience driving progress, solving problems, and mentoring...  ...5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or... 
    Full time
    Worldwide

    Google

    Mountain View, CA
    5 days ago
  • SpaceX is seeking a Senior RTL Design Engineer (Silicon Engineering) in California to develop next‑gen ASICs for Starlink and space networks. You will define architecture, write RTL in Verilog/SystemVerilog, and work with verification and physical teams to deliver timing... 

    SpaceX

    Palo Alto, CA
    2 days ago
  • Apple Inc. seeks an experienced RTL Design Engineer to code blocks for advanced mixed-signal circuits and to write precise design specifications...  ...engineers to ensure high-quality RTL and bug-free silicon. Using formal tools (LINT, CDC, RDC) and working with the PD... 

    Apple Inc.

    Sunnyvale, CA
    5 days ago
  • $163k - $237k

    Lead the microarchitecture and RTL execution to deliver high-performance network design components which meet strict power...  ...Bachelor's degree in Electrical Engineering, Computer Engineering, Computer...  ...pushes boundaries, developing custom silicon solutions that power the future... 
    Worldwide

    Google

    Sunnyvale, CA
    4 days ago
  •  ...Palo Alto seeks a Founding Member of the Technical Staff for the RTL Design team. Your role will encompass AI-driven RTL design of...  ...blocks and engage in challenges at the intersection of AI and silicon design. The position requires significant experience in RTL design... 

    Kindredventures

    Palo Alto, CA
    3 days ago
  •  ...opportunity to work in the AMD SOC Verification Team as Silicon Design Verification Engineer where you will work with a team and experts in verification...  ...design blocks and close the coverage.Coordinate with RTL engineers to implement logic design for better clock gating... 

    AMD

    San Jose, CA
    9 hours ago
  • Google is seeking an RTL Design Engineer for the TPU team in Sunnyvale, CA to shape next‑gen AI accelerators. You will design and verify microarchitecture...  ..., area, and power while contributing to cross‑functional design flows and post‑silicon support. #J-18808-Ljbffr Google Inc.

    Google Inc.

    Sunnyvale, CA
    5 days ago
  • $163k - $237k

    Verify designs using verification techniques and methodologies.Work cross-functionally to debug failures...  ...and performance validation for both pre-silicon.Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related... 
    Worldwide

    Google

    Mountain View, CA
    4 days ago
  • $175k - $280k

     ...actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the... 
    Permanent employment
    Temporary work
    Worldwide
    Weekend work

    SpaceX

    Palo Alto, CA
    1 day ago
  •  ...embedded IP, resulting in final designs that meet product defined...  ...functionality that operates on silicon and is modeled accurately for...  ...experience collaborating with other engineers located in different sites/...  ...determine the root cause; work with RTL and firmware engineers to... 

    AMD

    San Jose, CA
    4 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to RTL Design Engineer, Silicon. Be the first to apply!