Formal Verification Engineer
$100kTenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.Tenstorrent is looking for a Formal Verification Engineer to help ensure the correctness of our next generation of high-performance RISC-V CPUs and AI compute platforms. You’ll use formal methods to prove complex hardware behavior, uncover corner cases that simulation may miss, and give architects and RTL designers confidence in the correctness of their designs.You’ll work closely with CPU architects, RTL designers, and other DV engineers to develop properties, build formal verification environments, analyze failures, and drive issues to closure. This is a hands-on opportunity to apply formal techniques to challenging problems in modern processor design.This role isremote, based out of North America or Spain.We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.Who You AreA verification engineer who enjoys solving complex problems and finding bugs that are difficult to expose through traditional simulation.Comfortable thinking about hardware behavior in terms of properties, invariants, assumptions, assertions, and proofs.A strong debugger who can analyze counterexamples, understand RTL behavior, and determine the root cause of failures.Collaborative and curious, with an interest in working closely with architects and RTL designers to improve design quality.Excited by the challenges of verifying high-performance CPUs and complex digital hardware.What We Need6+ years of experience in design verification, formal verification, or related RTL verification for CPUs, SoCs, ASICs, or complex digital designs.Hands-on experience with formal verification methodologies and tools, including property checking, assertions, assumptions, constraints, and coverage analysis.Strong SystemVerilog skills, including experience writing and debugging SVA.Solid understanding of digital design and computer architecture; experience with CPU pipelines, caches, interfaces, control logic, or other complex microarchitecture is highly valuable.Strong programming and scripting skills in Python, Tcl, C/C++, or similar, with excellent debugging and problem-solving abilities.What You Will LearnGain deep experience applying formal verification to high-performance, out-of-order RISC-V CPU designs.Learn how to identify which hardware behaviors are best verified through formal methods versus simulation, emulation, and other DV techniques.Develop expertise in writing scalable properties and proofs for complex control logic and interacting microarchitectural blocks.Learn how architectural intent translates into formal properties, assumptions, and measurable verification goals.Work alongside world-class CPU architects and RTL engineers on next-generation processors for AI, HPC, and high-performance computing.Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
$150k - $350k
...ChipAgents is revolutionizing chip design and verification with agentic-AI workflows. Founded by experts in AI and semiconductor... .... Role Overview We are seeking a highly capable Formal Verification Engineer to join our core product and research team. You will work...SuggestedShift work- ...Job Title: Formal Verification Engineer Location: San Jose, CA - Full Time Job Description: We are looking for formal verification experts to ensure design correctness using mathematical verification techniques and advanced formal tools....SuggestedFull time
- .... About This Role In this role, you’ll build formal proofs of design correctness using model checking, property verification, and equivalence analysis. You’ll collaborate... ...and ML research teams to develop hybrid formal engines that reason about AI‑generated hardware at...Suggested
$160k - $275k
...availability. We build the full stack—from silicon and rack design through compilers, kernels, and ML models. We are seeking a Formal Verification Engineer to bring rigorous mathematical guarantees to our hardware and software at every layer of the stack. What You'll Do...SuggestedDaily paidFull timeWork experience placementLocal areaRemote workMonday to FridayFlexible hoursShift work- ...Harmonic At Harmonic, we are building a mathematical reasoning engine that operates with absolute precision. While most AI makes... ...elite technical team. About the Role We are seeking a Formal Verification Engineer to verify production hardware and software with...Suggested
$167.1k - $250.7k
...Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group CPU Engineering General Summary As a Design Verification Engineer, you will work with Chip... ...Verification. Advanced techniques such as: Formal, Assertions, and Silicon bringup, is helpful...Work from home- ...and software development. We're seeking engineers who are energized by working on cutting-... ...Networks is hiring Mid-Level and Senior ASIC Verification Engineers with advanced skills and... ...and analyze coverage results Execute formal verification of block level RTL Participate...Remote workFlexible hours
$116k - $189.75k
...NVIDIA’s Clocks team is looking for an experienced ASIC Design Verification engineer to join our team! The NVIDIA Clocks Team is committed to... ...flows like SV constraint random verification, UVM, Formal Verification, Coverage metrics, profiling tools, X prop, etc...Full time- ...ASIC Verification Engineer Join one of the industry's leading companies in Smart Edge SoCs for network/systems control, management security... ...verification methodologies like UVM, Portable Stimulus and Formal verification flows. You will report to the Director of Engineering...
$158.5k - $321k
...Senior ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from... ...development. You will use state-of-the-art tools for doing formal verification, code coverage analysis, gate sims, and more. You...Work experience placementWork at officeLocal area2 days per week$181k - $367k
...Principal ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week... ...(e.g., Jenkins). Understanding of low-power (UPF) or formal verification methodologies. Own and drive block-level/subsystem...Work experience placementWork at officeLocal areaImmediate start2 days per week$153.5k - $310.5k
...Senior Design Verification EngineerThis role has been designed as 'Hybrid' with a requirement... ...talented and driven Senior Design Verification Engineer with specialized knowledgeand... ...AMBA, I2C, SPI, or UART. Experience with formal verification tools and techniques (e.g.,...Work experience placementWork at officeLocal areaImmediate start2 days per week- ...Position: Design Verification Engineer (eInfochips Inc) Job Description What You'll Be Doing Strong SV/UVM expertise AXI/NOC/Ethernet/PCIe/UCIe... ...documents. Implement and maintain integrated end-to-end formal verification flow for the formal verification objective. Develop...Full timeTemporary workWork at officeNight shift
- Senior ASIC Verification Engineer (AI Hardware) — Remote (U.S.) — No Visa Sponsorship Overview Our client anAI / Compute company of the verge... ...hardware/software integration or co-verification Familiarity with formal verification methods Exposure to post-silicon validation,...Remote workVisa sponsorship
- ...Description We are looking for an experienced design verification engineer to join our SoC team at Baidu’s Sunnyvale office. The successful... ..., HBM, GDDR, DDR, MMU, Cache). Familiar with C/C++. Formal Verification (Model Checking, Equivalence Checking). Excellent...Work at office
- ...Description: About the Role Intel is seeking a Senior Design Verification Engineer for the Silicon Chassis team. In this role, you will own end... ...across teams Drive convergence of simulation and formal verification into unified bug hunting and coverage closure strategies...Full timeInternshipLocal areaImmediate startShift work
- ...Oracle. THE PERSON: We are seeking a high‑impact Design Verification Engineer with strong technical depth, ownership, and the ability to... ...verification, power‑aware verification (UPF), or formal verification Familiarity with FPGA/HAPS‑based validation...
$157k - $235k
...We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered... ...tomorrow. You Are You have spent years working with formal verification tools and you know the difference between a tool that runs...$130k - $221k
...faster than ever. About the Role As a Senior Design Verification Engineer, you will develop and support the tools, automation, and... ...-GDS tools such as Fusion Compiler, Innovus, PrimeTime, or Formality. Experience with parasitic extraction tools such as StarRC...Full timeLocal areaImmediate start$148.5k - $165k
...requirements. Discover more at Role Overview As a Senior Design Verification Engineer, you will help define and deliver robust verification for... ...and switching protocols. Knowledge of protocol checkers, formal verification, emulation, or hardware acceleration methodologies...Flexible hours$167.7k - $245.2k
...Participate in the ASIC design verification for Cisco high-end switching products.... ...in electrical/computer science/computer engineering/related degree and 7+ years of related... ...Experience in Networking. Experience with Formal verification. Why Cisco? At Cisco...Full timeTemporary workLocal areaFlexible hours$184.7k - $324.8k
...Design Verification Engineer Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas... ..., a range of discounted products and free services, and for formal education related to advancing your career at Apple,...Relocation- ...Design Verification Engineer Location: Sunnyvale, CA Rate: 50/hr W2 Client is Microsoft Required: ~7+ years of ASIC verification experience... ...desired C/C++ experience is desired Scripting skills(Perl, Python) Formal verification experience is a plus...
$200k - $300k
...Role Overview We are looking for talented Design Verification Engineers to help verify and deliver Velaura's next-generation Physical AI... ...verification environments using SystemVerilog, UVM, C/C++, assertions, formal verification, emulation, and related methodologies. •...Flexible hours$167.7k - $245.2k
...future of the digital world. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s... ...such as Veloce, Palladium, Zebu, or HAPS. Knowledge of formal verification tools (e.g., IEV or VC Formal). Domain knowledge...Full timeTemporary workLocal areaFlexible hours$160k - $240k
...the craft seriously. What we need: An experienced RTL Verification Engineer responsible for ensuring the functionality, correctness, and... ...tasks to completion Desired Skills: Experience with formal verification techniques and tools Experience verifying processor...Remote work$105.65k - $149.15k
...limited to: Performs functional logic verification and emulation validation of an integrated... ...in electrical or computer science, Engineering or related field. Related coursework/technical... ...coverage-based design verification and Formal Verification methodology. Complete...InternshipLocal areaImmediate startShift work$167.7k - $245.2k
...future of the digital world. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary... ...such as Veloce, Palladium, Zebu, or HAPS. Knowledge of formal verification tools (e.g., IEV or VC Formal). Domain knowledge...Full timeTemporary workLocal areaFlexible hours$140k - $200k
...experiencedVerificationEngineer to join our engineering team. In this role, you willbe... ...architecture specifications into executable verification plans Design, develop,... ...Advanced assertion-based verification or formal intent Exposure to gate-level simulation...Full timeWork at officeImmediate startVisa sponsorshipNight shift- ...ranging and and run the gamut of working closely with design engineers to stay abreast of the specification and implementation of ASIC... ...comprehensive test and coverage strategies, implementing the verification environment and tests using object-oriented tools, in...Work at officeFlexible hours
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