ASIC DFT CAD Technical Leader

Application window is expected to close on: 07/24/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Who We Are: The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non‑Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best‑of‑breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's revolutionary solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Key Responsibilities: Own and drive end-to-end DFT flow architecture. Build and maintain scalable DFT CAD infrastructure from RTL, DFT insertion, ATPG, simulation, reporting. Develop robust regression frameworks (LSF/cluster-based) with job orchestration, monitoring, logging, and failure recovery. Lead AI-driven automation initiatives for log analysis, failure triage, regression optimization, and intelligent debug. Collaborate with RTL, Physical Design, and Validation teams to ensure seamless DFT integration and signoff. Define and track key metrics (coverage, pattern count, runtime, regression health) and build dashboards for visibility. Standardize flows, improve reusability, and enforce best practices across projects. Evaluate and integrate new tools, methodologies, and AI technologies into existing flows. Mentor and guide engineers, driving technical excellence and innovation within the team. Minimum Qualifications: 8+ years of experience in DFT, CAD, or test automation for semiconductor designs. Prior experience with EDA DFT toolchain like Synopsys TestMAX, Synopsys VCS, Siemens Tessent and similar. Experience in Tcl, Python, Perl, and shell scripting. Experience building automated flows and regression systems in compute farm environments (LSF/ or similar). Prior experience with SoC integration and cross-functional workflows. Experience applying AI/ML techniques to EDA workflows (log analysis, anomaly detection, predictive insights). Preferred Qualifications: Familiarity with data analytics tools (Python/pandas, dashboards, visualization tools). Experience with large-scale regression systems and distributed job management. Exposure to ATE/tester formats (e.g., STIL) and silicon bring‑up/debug. Message to applicants applying to work in the U.S. and/or Canada: The starting salary range posted for this position is $183,800.00 to $263,600.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job‑related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long‑term disability coverage, and basic life insurance. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non‑exempt employees 1 paid day off for employee’s birthday, paid year‑end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non‑exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full‑time employees Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non‑sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies. Employees on sales plans earn performance‑based incentive pay on top of their base salary, which is split between quota and non‑quota components, subject to the applicable Cisco plan. For quota‑based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non‑quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $183,800.00 - $303,100.00 Non‑Metro New York state & Washington state: $163,600.00 - $269,800.00 #J-18808-Ljbffr Cisco Systems, Inc.