Senior Memory Controller Verification Engineer
$168k - $264.5kNvidia
NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our GPU Memory Subsystem IP verification Team! At NVIDIA, we have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will partner with the design and architecture teams to help make the right implementation choices, craft and implement verification test plans, maintain regressions, close coverage and sign off design or both functional correctness and for meeting performance expectations. This position offers the opportunity to have a real impact on multiple product lines including consumer graphics, self-driving cars, HPC, cloud computing, and AI! What you’ll be doing:
- Develop verification infrastructure (testbenches, BFMs, checkers, monitors, randoms)
- Come up with, review and drive test plan execution for planned features
- Understand the performance requirements of your IP, come up with, review and drive performance testplan for your IP
- Ensure code and functional coverage of all the RTL which you will verify.
- Work with and enable FPGA and software teams to ensure that software is tested.
- Plan for and be involved with post-silicon verification and debug.
- BS / MS or equivalent experience.
- 6+ years of ASIC verification experience of complex design units displaying good attention to detail, teamwork, problem solving and shown success
- Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).
- Background with System Verilog and UVM based methodology for ASIC verification.
- Strong C/C++ programming experience
- Prior Design or Verification experience of dynamic memory controllers (ddr{2, 3, 4, 5}, lpddr{2, 3,4,5,6}, HBM, or GDDR)
- Strong debugging and problem solving skills.
- Scripting knowledge (Python/Perl/shell).
- Good interpersonal skills and ability & desire to work as a part of a team.
- ...Description Job Description Experience: 5 12 Years Responsibilities Verify the HBM-based Memory Controller subsystem using SystemVerilog/UVM. Develop verification plans, UVM testbenches, test cases, assertions (SVA), and functional coverage. Verify the HBM...Senior
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