SoC Power Architecture Engineer - Processor Subsystem
$150k - $220kE-Space
Job Description
Job Description
Ready to make connectivity from space universally accessible, secure and actionable? Then you’ve come to the right place!
E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems.
We’re intentional, we’re unapologetically curious and we’re 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life.
We are seeking an experienced SoC Power Architecture Engineer to define, design, and implement power domain architectures for ASIC-based processor subsystems targeting satellite IoT connectivity applications. This role focuses on partitioning and structuring power domains within complex processor subsystems, with a strong emphasis on the aggressive duty cycling, ultra-low standby power, and constrained energy budgets inherent to satellite IoT end-node devices.
Key Responsibilities:· Define and architect power domains within processor subsystems, including always-on, switchable, and retention domains optimized for low-power use cases
· Design and implement power domain partitioning strategies for subsystems involving embedded processors, bus interconnects, and associated peripherals
· Develop and integrate supporting logic for power domain separation, including power switches, isolation cells, level shifters, and retention registers
· Define and implement power control sequencing and state machines for domain power-up/power-down flows, with emphasis on fast wake-up latency requirements for satellite link windows
· Collaborate with SoC architects, physical design, and verification teams to ensure power domain intent is correctly captured in UPF
· Drive definition of low-power modes (e.g., Sleep, Deep Sleep, Power-Off) and their interaction with system-level power management in battery- or energy-harvesting-powered IoT devices
· Work with processor subsystem reference designs as a baseline and adapt the power architecture to the unique demands of satellite IoT SoCs
· Support power-aware synthesis, place-and-route, and sign-off flows in coordination with the physical design team
· Define and review power intent files (UPF/IEEE 1801) and ensure consistency with RTL implementation
· Engage with verification teams to ensure power domain structures are properly tested and validated across all low-power operating modes
Required Qualifications:· Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
· 7+ years of experience in ASIC/SoC design with a strong focus on low-power architecture
· Deep hands-on experience with power domain definition, isolation strategies, and retention architectures
· Proficiency with UPF (IEEE 1801) power intent format
· Strong knowledge of RTL design using SystemVerilog or VHDL
· Demonstrated experience optimizing for ultra-low power consumption in energy-constrained applications such as IoT, wearables, or similar
· Familiarity with low-power synthesis and physical design constraints
Preferred Qualifications:· Experience with Arm Corstone or similar processor subsystem IP, including Arm processor subsystems (Cortex-M series) or similar embedded processor architectures
· Knowledge of AMBA bus protocols (AHB, APB, AXI) as they relate to power domain crossings
· Experience with power analysis tools (e.g., Synopsys PrimeTime PX, Cadence Joules)
· Understanding of battery-powered and energy-harvesting device constraints as they influence SoC power architecture decisions
· Familiarity with power management ICs (PMICs) and their interface to domain control logic
This is a full time, exempt position, based out of our Saratoga office. The target base pay for this position is $150,000 - $220,000 annually. The total compensation packaged will be determined by various factors such as your relevant job-related knowledge, skills, and experience.
We are redefining how satellites are designed, manufactured and used—so we’re looking for candidates with passion, deep knowledge and direct experience on LEO satellite component development, design and in-orbit activities. If that’s your experience – then we’ll be immediately wow-ed.
E-Space is not currently able to provide employment sponsorship for candidates who do not hold work authorization for the location of this role
Why E-Space is right for you:
As a member of our team, you will play a crucial role in driving our success. Our team members have a strong sense of dedication and responsibility; this includes a strong commitment to our mission to create an entirely new suite of global capabilities to improve lives, business efficiencies and build a smarter planet. This means that there will be times when extra hours, including nights and weekends, may be needed to meet critical deadlines and mission goals. In return, we offer a dynamic work environment with opportunities for professional growth and development and the chance to make a meaningful impact in a high-growth industry.
We want you to make the most of your journey at E-Space. That’s why we support and invest in the physical, emotional and financial well-being of our team members and their families. Some of what you can expect when working at E-Space:
• An opportunity to really make a difference
• Sustainability at our core
• Fair and honest workplace
• Innovative thinking is encouraged
• Competitive salaries
• Continuous learning and development
• Health and wellness care options
• Financial solutions for the future
• Optional legal services (US only)
• Paid holidays
• Paid time off
We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.
$147.4k - $272.1k
...intricate challenges? Join the Low Power group at Silicon Technologies... ...capabilities for the Silicon Engineering Power team. Your... ...efficiency. You’ll be involved in the architecture, implementation, and... ...Solid grasp of VLSI designs and SOC design processes. Enthusiasm...SuggestedRelocation$167.1k - $250.7k
...Technologies, Inc. in Santa Clara seeks a Design Verification Engineer to validate CPU and SOC designs. Responsibilities include working with engineers... .... The ideal candidate has deep knowledge of micro-processor verification and holds a Bachelor's degree in Computer Engineering...Suggested$147.4k - $272.1k
...for a strong candidate to join our processor verification team focusing on Power Management and Clock Control... ...Processor Power Management Verification Engineer, you will have the... ...responsibilities as follows: Work closely with architecture and RTL designers on verifying...SuggestedRelocation$136k - $218.5k
NVIDIA Gruppe is seeking a Senior Power Architecture & Optimization Engineer in Santa Clara, California. This role involves utilizing advanced analytics and AI to enhance energy efficiency of GPUs and SoCs. Candidates should have a solid background in power architecture...Suggested- ...company in Cupertino is seeking a talented individual for a role in low-power chip design. You will craft innovative solutions to complex challenges in collaboration with the Silicon Engineering Power team, leveraging AI and machine learning to develop tools that enhance...Suggested
$147.4k - $272.1k
A leading technology company in Cupertino is seeking a Power UPF Engineer to enhance Unified Power Format methodologies for mobile SOC designs. You will be crucial in improving power intent coverage and integrating AI/ML into UPF processes. Ideal candidates possess a bachelor...$204k - $259k
Senior Power Engineer, ASIC at Waymo - Mountain View, CA, USA Waymo is an autonomous driving... ...; we develop system‑level compute architectures that push the boundaries of performance... ...efficiency solutions at the chip and subsystem‑level Specify, micro‑architect and implement...Full timeRemote work- ...forward-thinking semiconductor startup at the forefront of RISC-V and Chiplet Architecture. As a Design Verification Engineer, you'll play a crucial role in advancing innovative processors and subsystems. This dynamic position involves developing verification plans,...
$181.1k - $318.4k
...part of the Wireless SOC team, you will... ...different types of SOC architectures, high speed layered protocols, low-power driven... ...Design Verification Engineer on our team, you\'... ...PCIE, CPUs and multi-processor systems, Power Management... ...Memory Controller Subsystems, USB, PLL, power...RelocationNight shift$126.8k - $190.9k
Display Architecture Validation Engineer Cupertino, California, United States Hardware Are you passionate... ...you will collaborate with Display and SoC architects, SoC design and verification... ...sub‑system of Apple’s application processor chip (System on a Chip, or SOC). Responsibilities...Relocation- Intel Corporation in Santa Clara is seeking a Power and Performance Design Engineer to design and optimize cutting-edge IPs and SoCs. You will play a critical role in influencing new architectures and ensuring market demands are met. The ideal candidate has extensive experience...
$75k - $275k
...traditional compute architectures are increasingly constrained by power, memory bandwidth,... ...architects and engineers to rethink how AI,... ...generation Physical AI SoC. In this role,... ...engines, memory subsystems, interconnect fabrics, control processors, DMA engines, and...Flexible hours$158.76k - $194.04k
...computing with the open RISC‑V architecture, providing high‑performance,... ...Job Description SiFive seeks a Power‑Management/Reset/Clock Micro‑Architect and RTL Design Engineer to design industry‑leading CPU... ...industry experience in CPU and SoC clocking, reset, and power‑...Flexible hours$147.4k - $272.1k
...Division is seeking a talented Analog & Power Systems Engineer to join a creative and collaborative... ...— including power management subsystems, wired and wireless charging, and mixed... ...background, your focus may span power architecture and PMICs, charging systems and battery...Contract workRelocation package$115k - $268k
...the semiconductor industry: RISC-V and Chiplet Architecture. Check out our CEO discussing with global tech... ...industry. We are hiring multiple Design Verification engineers to advance our innovative RISC-V processors and subsystems. Role: Develop and execute verification plans...Contract work$105.65k - $200.34k
...and detail-oriented SoC Debug / Post-Silicon PnP Validation Engineer to join our Silicon Architecture diverse team, where... ...performing comprehensive power and performance... ...validation for systems, subsystems, and SoC-level... ...may know us for our processors. But we do so much more...Full timeWork experience placementInternshipLocal areaImmediate startShift work$181.1k - $318.4k
Software Engineer- SoC Level Validation Engineer Cupertino, California, United States Hardware Do you love creating elegant solutions... ...and manufacture our next‑generation, high‑performance, power‑efficient processor, system‑on‑chip (SoC). You’ll ensure Apple products and...Relocation$181.1k - $318.4k
Apple Inc. is seeking a Software Engineer for SoC Level Validation in Cupertino, California. You will craft and build technology for high-performance processors and ensure Apple products meet quality standards. The ideal candidate has extensive experience in software engineering...$131.4k - $197k
...and tools, and safety architecture to accelerate the growth... ...As Software Engineer, you will be the senior... ...on Qualcomm robotics SoCs. What You’ll Do Develop... ...envelopes across Linux + MCU subsystems; drive DDS/ROS 2 patterns... ...performance and low power on our SoCs. Drive...Work experience placement- ...A leading technology company in Cupertino, California seeks a Silicon Validation Engineer to enhance Apple SoCs through rigorous testing and validation. You will collaborate with functional test writers, execute tests, and provide insightful feedback to improve product...
$100k - $166.75k
Low Power ASIC Engineer - New College Grad 2026 page is loaded## Low Power ASIC Engineer - New... ...development of energy-efficient GPU and SOC architectures. We are continually innovating in... ...Scaling (DVFS) etc.* Good understanding of processor architecture (GPU is a plus), and...- ...We are looking for a Low Power Design/Verification ASIC Engineer - New College Grad 2026.... ...will work with Low Power Architecture, Design, and Software teams... ...for NVIDIA’s GPU, SOC, and AI products. Responsibilities... ...Strong understanding of processor architecture (GPU...
$126.8k - $220.9k
A leading tech company in Sunnyvale is seeking an experienced engineer to join its wireless silicon development team. This role involves designing CPU-based subsystems and ensuring effective collaboration across functional areas. Candidates should have a Bachelor's degree...- Velaura in Santa Clara is seeking a CPU RTL Engineer to design RTL for their next-generation Physical AI SoC. The role involves optimizing CPU cores and collaborating... ...design and have a solid understanding of CPU architecture. Velaura offers competitive compensation and a...
$168k - $264.5k
...product development lifecycle, from early architecture definition through silicon bringup to... ...integrate system-level performance and power management features, controllers, and... ...translate architectural tradeoffs into clear engineering decisions. AI-assisted engineering...$181.1k - $318.4k
Overview Power & Performance Engineer - Platform Architecture role in Santa Clara, California, United States Hardware. The role focuses on understanding complex... ...systems and their impact on Power, Performance, and SoC design/integration to inform roadmap, with a direct impact...Relocation$100k - $166.75k
We are now looking for a SoC ASIC Verification Engineer New Grad! NVIDIA is seeking... ...verify the world's most powerful SoCs with AI capabilities... ...concepts of CPU or SoC architecture. Familiarity with verification... ...of SoCs with embedded processors or CPU verification. Ways...$168k - $264.5k
NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and... ...coherency across CPU and GPU memory subsystems, ensuring that coherency is maintained... ....* Collaborate extensively with Architecture, SW/FW, Design, Modeling, Emulation,...$181.1k - $318.4k
...Cupertino is seeking an experienced professional to join its Emulation verification team. The role involves working on verifying large SoCs and collaborating with various teams. Ideal candidates should have at least 10 years of experience, a BS degree, and strong skills...- What you'll be doing: Work with engineers to define verification... ...the demands of next‑generation SoCs. Collaborate with architects,... ...basic concepts of CPU or SoC architecture. Experience with verification of SoCs with embedded processors or CPU verification. The base...
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to SoC Power Architecture Engineer - Processor Subsystem. Be the first to apply!

