ASIC/FPGA Verification Engineer III

Basic Qualifications Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education. Experience in the verification of FPGA and/or ASIC devices. Experience with modern verification methodologies such as UVM, OVM or VMM. HDL programming experience with VHDL, Verilog, and/or SystemVerilog. Job Description Join Our Team as a ASIC/FPGA Verification Engineer where you will work on the development of a sophisticated state‑of‑the‑art avionics product in a world class Integrated Product Development environment. Location: This position does not support teleworking ; the selected candidate will be located near our Lockheed Martin Space facility in: Denver CO or Highlands Ranch CO Sunnyvale CA King of Prussia PA You will work a flexible 9x80 schedule in the office full‑time. Key Activities You Will Accomplish In This Role Verify designs for low SWaP, radiation hardened, space rated devices. Devise a unique verification plan for a given design. Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux‑based high‑performance computing environment. Develop test environments & test cases, generate reports, and document verification results. Work with an independent design team to document and resolve bugs found in the design. Support the full lifecycle of ASIC and FPGA development. Support technical reviews, and be able to present to internal and external stakeholders. To Be Effective In This Role, You Will Need ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM. 3+ years professional experience. While no clearance is needed to start in this position, you will need to obtain and maintain a DoD Secret clearance; thus US Citizenship is required. Desired Skills Experience or coursework in the verification of FPGA and/or ASIC devices. Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test). FPGA/ASIC design experience is a plus. Experienced in scripting such as Perl, TCL, Python. Experience leading small teams in technical work, setting priorities, managing schedules. Experience in creating project plans. Onsite Full‑time: The work associated with this position will be performed onsite at a designated Lockheed Martin facility. #J-18808-Ljbffr Lockheed Martin