ASIC/FPGA Verification/Emulation Engineer III

ASIC/FPGA Verification/Emulation Engineer We support over 50 R&D efforts across military, civil, and commercial space, missiles, missile defense platforms, satellite surveillance, deep space exploration, and manned flight missions. Location: Sunnyvale, CA; Highlands Ranch, CO; Littleton, CO; King of Prussia, PA. You will work a flexible 9x80 schedule in the office full‑time. Key Activities Validate and qualify ASIC and FPGA designs through simulation, hardware emulation, and lab bring‑up. Use SystemVerilog and Universal Verification Methodology (UVM) to verify designs in a Linux‑based high‑performance computing environment. Support technical reviews and present to internal and external customers. Qualifications 3+ years professional experience in ASIC or FPGA verification. Experience developing testbench infrastructure for simulation and emulation environments. Experience with current emulation technologies, especially Zebu or HAPS. Prior verification experience using UVM methodology. Previous technical leadership experience preferred. Bachelor of Science or higher in Computer Engineering, Electrical Engineering, or a related discipline (or equivalent experience). Need to obtain and maintain a Secret clearance; US citizenship required. Desired Skills Experience leading or managing ASIC projects. Self‑starter and voracious learner. High emotional intelligence. Space system design experience. Understanding of system and hardware requirements related to space. Customer‑facing communication experience. #J-18808-Ljbffr Lockheed Martin