Senior DFT Design Engineer for Next-Gen ICs
Altera Corporation
Altera Corporation in San Jose, CA, is seeking a Senior DFT Design Engineer to define DFT architectures and implement test logic for FPGA, processors, DSP, SERDES, IO, and multi-die designs. You will perform ATPG pattern generation and pre-silicon validation to ensure manufacturability and quality. You will collaborate with IP and integration teams to align DFT features with timing and functionality, and work with test development to support silicon bring-up, debug, and production readiness.
#J-18808-LjbffrVacancy posted 3 days ago
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