Principal / Senior Principal - SoC / RTL Low-Power Expert
$182.36k - $273.2kMarvell
About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your ImpactMarvell Custom Solutions develops cutting-edge solutions for large AI, cloud data center, and telecom customers. The SoCs encompass best-in-class performance, advanced die-to-die and packaging technology, and optimized low-power techniques.We are seeking a SoC / RTL Low-Power Expert who serves as the final technical authority for power behavior across the full silicon lifecycle. This role owns power architecture, RTL power intent, estimation, correlation, and power sign-off, including situations where specifications or workloads are evolving.This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.What You Can ExpectOwn SoC and subsystem power architecture and power tradeoffsLead and enforce low-power RTL design practicesDrive RTL and early power estimation with realistic workload assumptionsOwn power correlation across RTL, gate, and post-PnR stagesServe as final escalation point for power issuesMake and defend power sign-off and tape-out decisionsSupervise or mentor other digital design engineers.What We're Looking ForBachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience. OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience.Deep expertise in SoC / RTL low-power designProven ownership of power closure on large designsAbility to predict power behavior and risks before tool analysisExperience resolving conflicting power data across design stagesTrusted technical authority across architecture, RTL, verification, and physical designExpected Base Pay Range (USD)182,360 - 273,200, $ per annumThe successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at View email address on click.appcast.io Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.#LI-TM1SummaryLocation: US-CA - Santa ClaraType: Full time
$200k - $250k
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We are looking for a Senior GPU Low Power Architect within our Hardware Team! NVIDIA is known as a world... ...development of hyper-efficient GPU and SOC architectures that power AI, Automotive,... ...and innovate low power architectural/RTL solutions and drive features and roadmaps...SeniorFull time$200k - $260k
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...industries and give customers the power to shape their markets. For more information... ...for Defining, leading and owning RTL development of a performance efficient, low-power CPU core. The candidate will... ...of CPU integration at SoC levelUnderstanding of Safety and Security...PrincipalSeniorFull timeLocal area$182k - $319k
....Our customers experience firsthand the power of our people - people who share a passion... ....Let’s engineer the future together.The Senior Principal, Design Engineering will be responsible... ...mitigationsExperience with high power, low noise, efficient, high density board level...PrincipalSeniorLocal area$200k - $260k
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...advance faster than ever. We are seeking a Senior / Principal Layout Engineer to drive pathfinding and... ...PCB technologies, including: Ultra-low-loss materials Advanced HDI (microvias,... ...discontinuities, channel loss mechanisms) ~ Power integrity (PDN design, target impedance,...PrincipalSeniorFull timeLocal area- ...seeking a highly skilled and experienced SoC (System-on-Chip) Engineering Leader to direct... ...Architecture and Verified Designs for Power and Clocking. If you are a self-motivated... ...Interface (SCMI), ACPI and BSA, Processor low power states, Use-Cases power and Performance...SeniorWork at officeLocal area
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...the gap between architecture, RTL implementation, and physical design.Serve as subject matter expert on power delivery/regulators, power gating... ...circuit design.Well versed in low power techniques that span the... ...design.Knowledge of GPU and SOC design.Experience of advanced...PrincipalFull time- ...modeling and scene understanding Task and motion planning Low‑latency control and actuation Learning and adaptation loops... ...architectural patterns Translate real‑world constraints (latency, power, safety) into: Platform requirements Architecture refinements...PrincipalSenior
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...Represent the architectural vision to senior collaborators and technical teams through... ...minimum 10+ years of shown experience in SoC/system architecture, technology strategy,... ...architecture requirements including server-class power management techniques, high-speed IO interfaces...PrincipalSeniorWork at officeLocal areaRemote work- ...world of technology.The primary focus of Senior Principal Solutions Engineer is to support the... ...focused efforts. Job exposure will be on RTL to GDSII delivery of projects. There's... ...knowledge are required * Innovate with Low Power and Multi-Voltage Design Techniques working...PrincipalSeniorFull timeLocal area
$120k - $275k
...You'll Do HereDevelop and maintain power estimation methodologies for AI accelerator SoCs.Build and calibrate energy models... ...and power target definition.Perform RTL, gate-level, and post-layout power... ...SoC design.Experience with ASIC low-power design techniques.Experience...SeniorFull timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours$209.5k - $299.2k
...Architect at Altera is a senior technical authority... ...Altera’s most advanced FPGA, SoC, and multi‑die silicon... ...deeply with architecture, RTL, physical design,... ...time, yield improvement, power‑aware test, and overall... ...insertion, STA constraints, low‑power DFT, and gate‑level...PrincipalLocal areaShift work$231.1k - $358.2k
DescriptionJob Title: Sr. Principal SoC ArchitectJob Location: San Jose, CA (This position requires... ...: SiMa.ai is looking for a senior architect to lead its SoC architecture.... ...architecture that balances performance, power, cost, and programmability.Work with Silicon...PrincipalSeniorFull timeWork at office$191.53k - $286.9k
...IP, and technology teams.As a Senior Principal Memory Architect, you will... ...memory subsystem solutions that power cutting-edge data center... ...in close collaboration with RTL, physical design, and validation... ...for server or high-performance SoC designs.Soft Skills:Strong analytical...PrincipalSeniorPermanent employmentInternshipWork at officeRemote workWork from home$168k - $336k
...intelligence, inspiring the world to learn, communicate and advance faster than ever.Job DescriptionPosition Title: ASIC Design Verification SoC Lead (Technical lead role)Position Description: This is a position for lead member in Micron’s ASIC Verification and Emulation group....PrincipalFull timeLocal areaImmediate start$182.36k - $273.2k
...Argentina — and we are looking for a senior experienced technical leader to... ...SerDes, DSP datapath, and SoC architecture· Proactively... .../5nm), including architecture, RTL, physical design, DFT, timing closure... ...Voltage Scaling) or similar power optimization subsystems· Knowledge...PrincipalSeniorPermanent employmentFull timeWork from home$182.36k - $273.2k
...processing to meet demanding performance, speed, power and latency requirements of the... ...verify, and document micro-architecture and RTL for complex power management integrated circuits... ...in Verilog/SystemVerilog, Synthesis, STA, low power design, Spyglass and Quality checks...PrincipalSeniorPermanent employmentFull timeInternshipWork from home$136k - $218.5k
...with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software... ...NVIDIA's next generation GPUs, CPUs and Tegra SOCs. Your contributions will help us... ...understanding of chip design process from RTL design to tape-out.Background in machine...SeniorFull time- ...specifications and develop firmware applications for low-power, small-system environments.Design,... ....POSITION PURPOSEAs a hands-on Architect/Senior Manager you will architect, design, build... ...for embedded/IoT systems or custom SoCs• B.S. degree in Computer Science or Electrical...PrincipalSeniorFull timeFor contractorsLocal areaImmediate startRemote work
$152k - $241.5k
...software organization. Help build efficient kernel drivers and firmware for ARM SoCs, impacting product lines like Robotics, self-driving cars, and AI.What you will be doing:Design and implement power management policy in system software solutions for Tegra Automotive,...SeniorFull time$136k - $218.5k
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...world.We are looking for a highly motivated Senior System Software Engineer to develop and... ...infrastructure. You will work at the intersection of SoC architecture, cellular systems, firmware,... ...O-RAN and cellular infrastructure.Develop power-management policies and performance...SeniorFull timeRemote work$272k - $431.25k
NVIDIA is seeking a Principal SoC Architect to join our architecture team and drive the next generation... ...processor and system architectures that power the world’s most advanced autonomous... ...hardware feature sets tailored for low-latency robotics spatial computing, sensor...PrincipalFull time$193.3k - $261.5k
AWS designs custom SoCs (System on Chips) that power the world's largest machine learning training and inference... ...builds both the SoCs and the low-level software stack that brings these... ...silicon- Collaborate with chip architects, RTL designers, modelers, compiler engineers...SeniorLocal areaFlexible hours$183k - $247.6k
...develops the Inferentia and Trainium SoCs that are used to power today’s AI workloads in datacenters all... ...every stage of the design from early RTL to final netlist and by driving ways to... ..., software teams, and Physical Design experts - defining best practices to reduce power...SeniorLocal areaFlexible hours
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