Validation Engineer 3

Job Description

Job Description

Job Title: Validation Engineer Job Description

This role focuses on silicon validation, testing, and debugging for complex CPU/SoC platforms. The Validation Engineer will verify functional and electrical behavior of interfaces and subsystems, collaborate closely with hardware and firmware teams, and use industry-standard tools and scripting languages to ensure robust system-level performance and reliability in a lab environment.

• Perform silicon validation, testing, and debugging activities for CPU/SoC platforms and related subsystems.
• Validate functional behavior of PCIe, CXL, endpoints such as network and storage devices, power management, and BIOS/firmware features.
• Conduct electrical validation of input/output interfaces and related signals using appropriate lab equipment.
• Apply computer architecture and CPU/SoC validation principles to verify SoC subsystems, system-level, and platform-level functionality.
• Develop and maintain scripts and software in Python, C, and C++ to automate validation tasks, data collection, and analysis.
• Understand and work with system-level software and firmware to support debug, validation, and feature enablement.
• Use hardware and software debug tools such as oscilloscopes, logic analyzers, JTAG, and BERT to identify, isolate, and resolve issues.
• Review and interpret board-level schematics to support debug activities and validate hardware implementations.
• Collaborate with cross-functional engineering teams to communicate findings, propose solutions, and drive issues to closure.
• Document validation plans, test cases, results, and root-cause analyses in a clear and organized manner.
• Participate in technical interviews and discussions related to prior experience as part of the hard skills assessment process.
• Demonstrate strong attention to detail and analytical thinking when investigating complex validation and system-level problems.

• Bachelors or masters degree in electrical engineering, computer engineering, or a related field.
• At least 3 years of experience in silicon validation, testing, or debugging.
• Demonstrated hands-on engineering-level experience in silicon validation (beyond technician-level responsibilities).
• Validation experience with functional interfaces and features such as PCIe, CXL, endpoints (network and storage), power management, and BIOS/firmware development and debug.
• Experience with electrical validation of input/output interfaces.
• Applied understanding of computer architecture and CPU/SoC validation principles, including SoC subsystem, system-level, and platform-level functionality.
• Ability to write scripts and software using industry-standard languages such as Python and C/C++.
• Understanding of system-level software and firmware and how they interact with hardware platforms.
• Proficiency with hardware and software debug tools, including oscilloscopes, logic analyzers, JTAG, and BERT.
• Proficient in scripting and programming languages such as Python, C, and C++.
• Ability to read and understand board-level schematics to support validation and debug.
• Strong problem-solving and analytical skills, with the ability to troubleshoot complex technical issues.
• Clear and effective communication skills for collaborating with engineering teams and documenting findings.

• Some knowledge of Verilog and digital design concepts.
• Experience with validation protocols related to PCIe, CXL, BIOS, and other silicon interfaces.
• Attention to detail in test execution, documentation, and issue tracking.
• Ability to participate in a hard skills assessment process that may include 12 rounds focused on behavioral questions and technical discussions based on prior experience.
• Willingness and ability to complete a full tenure period as required by the engagement.

This position is based in a lab environment in Hillsboro and requires working onsite five days per week. The role involves hands-on work with silicon, boards, and platforms, using equipment such as oscilloscopes, logic analyzers, JTAG interfaces, and BERT tools to perform validation and debug activities. You will work closely with other engineers in a collaborative setting, focusing on system-level validation of CPU/SoC platforms and related interfaces. The environment emphasizes precision, safety, and adherence to lab protocols, with a professional dress code appropriate for an engineering lab and office setting. The hard skills assessment process for this role is scheduled as soon as feasible and typically includes 12 rounds of interviews that cover behavioral topics and technical discussions based on your prior experience.

This is a Contract position based out of Hillsboro, OR.

The pay range for this position is $60.00 - $70.00/hr.

Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.

Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following: Medical, dental & vision Critical Illness, Accident, and Hospital 401(k) Retirement Plan Pre-tax and Roth post-tax contributions available Life Insurance (Voluntary Life & AD&D for the employee and dependents) Short and long-term disability Health Spending Account (HSA) Transportation benefits Employee Assistance Program Time Off/Leave (PTO, Vacation or Sick Leave)

This is a Contract position based out of Hillsboro, OR.

This position is anticipated to close on Nov 6, 2026.

This is a fully onsite position in Hillsboro,OR.

About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications withoutregard to race, sex, age, color, religion, national origin, veteran status, disability,sexual orientation, gender identity, genetic information or any characteristic protectedby law.

If you would like to request a reasonable accommodation, such as the modification oradjustment of the job application process or interviewing process due to a disability,please email View email address on ziprecruiter.com for other accommodation options.

San Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in thecity and county of San Francisco, we will consider for employment qualified applicantswith arrest and conviction records.

Massachusetts Lie Detector: It is unlawful in Massachusetts to require or administer a lie detector test as acondition of employment or continued employment. An employer who violates this lawshall be subject to criminal penalties and civil liability.

Use of Artificial Intelligence (AI): We may use Artificial Intelligence (AI) to support parts of our hiring process,including sourcing, screening, and evaluating candidates. AI helps assess applicationsand qualifications, but final decisions are made by our hiring team. By applying, youacknowledge and agree that your application may be reviewed using AI tools.