Average salary: $190,625 /yearly

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  • SoC Design Verification Engineer

     ...Overview Join to apply for the SoC Design Verification Engineer role at Inspire Semiconductor, Inc. Get AI-powered advice on this job and more exclusive features. At InspireSemi, we're not just building a chip; we're revolutionizing high-performance computing. Our groundbreaking... 
    Suggested
    Full time

    Inspire Semiconductor, Inc.

    Austin, TX
    2 days ago

  • SoC Design Verification Engineer

     ...SoC Design Verification Engineer for Long Term project in San Jose, CA (Onsite) Location : San Jose, C Job Description We are looking for a highly skilled SoC/Performance DV engineer to drive system-level validation and performance characterization of complex SoCs. The... 
    Suggested
    Night shift

    Lorven Technologies

    San Jose, CA
    2 days ago

  • SoC Design Verification Engineer

     ...AMD Design Verification Engineer What You Do At AMD Changes Everything At AMD, our mission is to build great products that accelerate next-generation...  ...growing team. As a key contributor, you will be part of a SOC team to drive and improve AMD's abilities to deliver the... 
    Suggested

    Advanced Micro Devices , Inc.

    San Jose, CA
    2 days ago

  • SoC Design Verification Engineer

    $120k - $250k

     ...ASIC/SOC Silicon Verification Engineer Mountain View, CA MatX's mission is to make the world's best AI models run as efficiently as allowed by...  ...verification closure towards various silicon milestones including design freeze and tapeout Who You Are Concept-to-... 
    Suggested
    Full time
    Work experience placement
    Local area
    Remote work
    Monday to Friday
    Flexible hours

    MatX

    Mountain View, CA
    2 days ago

  • SoC Design Verification Engineer

    $147.4k - $272.1k

     ...projects that Apple’s Silicon Engineering Group has embarked upon to...  ...verifying a set of sophisticated SOCs that are driving Apple’s...  ...outstanding DV methodology, verification on accelerated platforms, knowledge...  .... Description As a Design Verification Engineer on our... 
    Suggested
    Relocation
    Flexible hours

    Apple

    Austin, TX
    5 days ago

  • SoC/ASIC Design Verification Engineer

     ...trust their devices no matter where they’re built or where they’re deployed.   Role Overview   As a zeroRISC SoC/ASIC Design Verification Engineer, you will develop, verify, and maintain silicon in security-sensitive settings, including root-of-trust technology.... 
    Suggested
    Flexible hours

    zeroRISC

    Boston, MA
    29 days ago

  • Senior Design Verification Engineer (SoC/UVM, Remote)

    A leading engineering talent provider is seeking a Design Verification Engineer for a contract position. The ideal candidate will have 5+ years of experience, strong...  ...UVM, and hands-on experience in IP Block-level and SoC/Full Chip verification. Proficiency in C... 
    Suggested
    Contract work
    Remote work
    Flexible hours

    Triple Crown Services

    California, MO
    2 days ago

  • ASIC/SoC Design & Verification Engineer

    $70 - $100 per hour

     ...ASIC/SoC Design & Verification Engineer is a remote red-team track for stress-testing AI systems against adversarial prompts. Reviewers craft attack scenarios, document the failure mode, and pair each successful jailbreak with the rubric clause it violated so the safety... 
    Suggested
    Remote job
    For contractors
    10 hours per week

    AuraOne Human Data

    Remote
    6 hours ago

  • Design Verification Engineer - SoC

    $2,000 per month

     ...hardware for frontier intelligence. We co-design chips, racks, software, and...  ...top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure...  ...Job Summary We are seeking a Design Verification Engineer to join our Systems/Performance... 
    Suggested
    Work at office
    Relocation package

    Etched

    San Jose, CA
    20 days ago

  • Design Verification Engineer

     ...We are seeking an experienced and innovative Design Verification Engineer to join a world-class silicon design verification team. This role partners...  ...Experience verifying mixed-signal ASICs in complex SoC environments. Knowledge of signal processing concepts relevant... 
    Suggested

    Cirrus Logic

    Chandler, AZ
    2 days ago

  • Asic design Verification engineer

     ...Architect block and full‑chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires...  ...Debug RTL and gate simulations and work with design engineers to verify fixes. Write diagnostics for... 
    Suggested

    Mirafra Technologies

    California, MO
    2 days ago

  • Design Verification Engineer

     ...communication for millions of users worldwide. **Description** As a Design Verification Engineer, you'll be at the center of our silicon design group's...  ...baseband modems and RF link controllers for Apple's SOCs, you'll craft highly reusable UVM verification environments... 
    Suggested
    Worldwide
    Night shift

    Apple

    Austin, TX
    5 days ago

  • Design Verification Engineer

     ...About the job Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability...  ...in AI and Machine Learning, processor fabric subsystems, SOC/ASIC products for vision processing, aerospace FPGAs,... 
    Suggested
    Contract work
    Worldwide

    Omnicom Production

    Toponas, CO
    2 days ago

  • Design Verification Engineer

     ...Overview We are seeking a highly motivated Design Verification Engineer to join our Interface IP DV team . In this role, you will collaborate closely...  ...with IP specifications Collaborate with Integration and SoC DV teams to validate seamless interoperability of external... 
    Suggested

    7Rays Semiconductors

    San Jose, CA
    2 days ago

  • Design Verification Engineer

     ...seeking motivated and detail-oriented individuals to join our team as Engineer, Design Verification . This is a great opportunity to be part of a fast-paced environment working on next-generation automotive SoCs. You will be involved in developing industry-grade verification... 
    Suggested
    Internship

    Black Sesame Technologies Inc

    San Jose, CA
    2 days ago

  • Design Verification Engineer

     ...game? We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the...  ...for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage... 

    Apple

    San Francisco, CA
    4 days ago

  • Design Verification Engineer

     ...game? We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the...  ...for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage... 
    Work experience placement

    Apple

    Watertown, MA
    4 days ago

  • GPU DFT Design Verification Engineer

     ...Silicon Technologies group, you'll help design and manufacture our next-generation,...  ...love with their devices. The DFT Design Verification Engineer will be on a team which is responsible...  ...experience in large processors and/or GPU/SOC designs + Hands-on experience in... 

    Apple

    Cupertino, CA
    4 days ago

  • Design Verification Engineer

     ...are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology organization... 

    Apple

    Santa Clara, CA
    2 days ago

  • Design Verification Engineer

     ...Design Verification Engineer Location: Santa Clara, CA Duration: Long term Experience: 8-15 Years Key Responsibilities Strong understanding of SystemVerilog...  ...-based verification environments for IP, subsystem, and SoC level testing. Develop directed and random test cases,... 

    I-Flow

    Santa Clara, CA
    2 days ago

  • Design Verification Engineer

    $120.3k - $181.2k

     ...game? We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the...  ...for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage... 
    Relocation

    Apple

    Los Angeles, CA
    4 days ago

  • Design Verification Engineer

     ...collaborate, contribute, and revolutionize AI silicon and system. Description We are looking for an experienced design verification engineer to join our SoC team at Baidu’s Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive in this... 
    Work at office

    Baidu US

    Sunnyvale, CA
    1 day ago

  • Design Verification Engineer

    $200k - $400k

     ...Overview Senior Design Verification Engineer Job Summary We are seeking a Senior Design Verification Engineer to help verify and deliver next-generation AI SoC platforms. In this role, you will work closely with architects, RTL designers, software engineers, and system... 
    Permanent employment
    Temporary work

    Actalent

    Santa Clara, CA
    1 day ago

  • Design Verification Engineer

    $119.8k - $258k

     ...We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves close collaboration with design and architecture teams to verify complex digital systems. Responsibilities Develop and execute... 
    Full time

    Sintegra

    Sunnyvale, CA
    2 days ago

  • Design Verification Engineer

     ...Azure, and Oracle. The Person We are seeking a high‑impact Design Verification Engineer with strong technical depth, ownership, and the ability to...  ...comfortable leading verification efforts across IP, subsystem, and SoC levels. You will work in a fast‑paced, highly collaborative... 

    AMD

    Santa Clara, CA
    2 days ago

  • Design Verification Engineer

     ...Looking for Design Verification Engineer with following skills: UVM / UPF / VIP System Verilog / VHDL SOC verification Python or TCL Seniority level Associate Employment type Contract Job function Management, Design, and Information Technology Industries Staffing and Recruiting... 
    Contract work

    Millennium Software

    San Jose, CA
    2 days ago

  • Design Verification Engineer (eInfochips Inc)

    $87.4k - $132k

     ...Position: Design Verification Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Strong SV/UVM expertise AXI/NOC/Ethernet...  ...for architecting Verification Environment for ASIC SoC and providing verification support from defining verification... 
    Hourly pay
    Full time
    Temporary work
    Work experience placement
    Work at office
    Local area
    Night shift

    Arrow ECS

    San Jose, CA
    4 days ago

  • Design Verification Engineer

     ...Job Ti tle: Design Verification Engineer Location: Sunnyvale, CA Job Type: Full-time Work Arrangement: Onsite role, Work from Client Office...  .... Responsibilities: Define and implement IP/SoC verification plans, build verification test benches to enable... 
    Full time
    Work at office

    Abode Tech Zone

    Sunnyvale, CA
    5 days ago

  • Design Verification Engineer

    $97.7k - $182.62k

     ...Direct message the job poster from Capgemini Engineering About the Job You're Considering Join a...  ...and forward-thinking team as a Design Verification Engineer, contributing to the validation of advanced System-on-Chip (SoC) designs that integrate embedded CPUs and... 
    16 hours
    Full time
    Local area

    Capgemini Engineering

    Santa Clara, CA
    1 day ago

  • Design Verification Engineer

     ...Job Title Architect and create verification environments using System-Verilog and Universal verification methodology-UVM IPs and SoCs with embedded CPUs and analog mixed-signal interfaces. Develop test plans and coverage metrics from specifications and writing block... 

    Staffing the Universe

    Santa Clara, CA
    2 days ago