Average salary: $190,625 /yearly
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- ...A leading technology company in San Francisco is seeking a highly skilled design verification engineer to ensure bug-free first silicon for new products. The role involves developing methodologies for verification, creating test plans, and utilizing advanced tools and...SuggestedFull time
Apple Inc.
San Francisco, CA5 days ago $126.8k - $190.9k
...game? We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the... ...for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage...SuggestedFull timeRelocationApple Inc.
San Francisco, CA1 day ago$126.8k - $190.9k
...A leading technology company in San Francisco is seeking a design verification engineer. This role involves ensuring bug-free first silicon for part of the SoC/IP, developing verification methodologies, and creating detailed test plans. Candidates should have deep knowledge...SuggestedFull timeApple Inc.
San Francisco, CA1 day ago- ...ASIC Design Verification Engineer Client Overview Our client is building the first latency optimized SoC for their industry. Using its proven AI accelerator designs, we are targeting best in class latency with order of magnitude improvements for years to come. Low...SuggestedFull timeNight shift
SQL Pager LLC
San Francisco, CA5 days ago $310k - $380k
...develops silicon and system-level solutions designed for the unique demands of advanced AI... .... Were looking for experienced Design Verification (DV) Engineers to ensure functional correctness and... ...success verifying complex IP or SoC designs in industrystandard flows....SuggestedFull timeOpenAI
San Francisco, CA5 days ago$181.1k - $318.4k
...development team? Our wireless SoC organization is responsible... ...emphasis on highly energy-efficient design and new technologies that... ...-class vertically integrated engineering team spanning RF/Analog... ...design and integration, Design Verification, Emulation, Test and Validation...SuggestedFull timeRelocationApple Inc.
San Francisco, CA5 days ago- ...As a Design Verification (DV) Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices... ...3rd party IPs/VIPs and transactors Perform IP/SOC bringup in simulation, emulation and prototyping environments...SuggestedFull time
Amazon
San Francisco, CA1 day ago - ...game? We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the... ...for ensuring bugfree first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage...SuggestedFull timeWork experience placement
Apple Inc.
San Francisco, CA5 days ago - ...complex hardware and software ecosystems. They are seeking a Design Verification Engineer with deep expertise in SystemVerilog/UVM and digital ASIC... ...) Experience in highperformance computing or largescale SoC verification. Familiarity with emerging verification...SuggestedFull timeWorldwide
Quix Recruitment Group Ltd
San Francisco, CA5 days ago - **About the Job You're Considering** We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. The ideal candidate will be responsible for defining and implementing SoC verification plans, building verification...SuggestedFlexible hours
- ...Required Skills & Experience ~8–12 years of experience in SoC Verification ~ Hands-on experience debugging complex SoC issues involving ARM subsystems. ~ Verilog-HDL ~ C test development at SoC level ~ SV Assertions ~ Protocol Knowledge (JTAG, SPI, UART, serial...Suggested
ACL Digital
Austin, TX4 days ago - ...A leading technology company is seeking an ASIC Design Verification Engineer to optimize low latency SoCs for critical applications. The ideal candidate will have extensive experience in design verification, UVM, and a strong background in programming. In this role, you...SuggestedFull time
SQL Pager LLC
San Francisco, CA5 days ago - ...Job Title: Verification Engineer (SystemVerilog/UVM)&##128205; Location: Sunnyvale, CA or Austin, TX ~514 years experience... ...verification environments for IP, subsystem, and SoC-level testing. Understand design specifications and create comprehensive test plans based...SuggestedPart time
Globex Digital
San Diego, CA6 days ago - ...as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces... ...RTL and Gate simulations and work with design engineers to verify fixes. ○ Write diagnostics for...SuggestedPart time
Mirafra Technologies
San Jose, CA6 days ago $129.8k
...implementing the digital chip SOCs for communications via Low... ...Implement a state of the art verification environment to facilitate testing... ...correctness Work with the design and communication systems... ...Electrical / Communications Engineering or Computer Science, or related...SuggestedPermanent employmentAmazon
San Francisco, CA5 days ago- ...performance C++ functional models SoCs and platforms. • Work with... ...an understanding of new designs by working closely with architecture... ...Collaborate with design and verification teams to verify complex IP... ...'s degree in electrical engineering, Computer Engineering, Computer...Part time
Intelliswift - An LTTS Company
Boxborough, MA6 days ago $195k - $265k
...Key Responsibilities Specialized Verification Strategy: Develop verification infrastructure... ...in the verification of complex ASIC designs, ensuring compliance with industry standards... .... Offer actionable feedback to design engineers, focusing on identifying gaps and...Full timeEridu
San Francisco, CA1 day ago- ...prestigious high-frequency trading companies in the world to find a verification engineer to help verify their complex low-latency FPGA systems. You'll be joining a team at the forefront of innovation in design verification, where you'll be supported in pushing the...Part time
Platform Recruitment
Austin, TX3 days ago $190k - $265k
...Join to apply for the Design Verification Engineer role at Eridu AI Join to apply for the Design Verification Engineer role at Eridu AI Get AI-powered advice on this job and more exclusive features. This range is provided by Eridu AI. Your actual pay will...Full timeEridu AI
San Francisco, CA5 days ago- ...startup backed by top-tier investors and trusted by major chip design companies and AI chip startups. They operate at the cutting... ...design. They are seeking an experienced Design Verification Engineer with expertise in UVM. Their focus is on building verification...Full time
EDA CAREERS, (Technology Futures Inc).
San Francisco, CA5 days ago $200k - $250k
...Lead Semiconductor Recruiter in San Francisco, CA. You will drive the design and development of high-performance processor technologies. The role requires a strong understanding of microprocessor or SoC design with 6+ years of experience. Candidates should be proficient...Full timeOho Group Ltd
San Francisco, CA5 days ago- ...A leading tech company in San Francisco seeks a Design Verification Engineer to develop verification methodologies and plans, ensuring the functionality of complex hardware designs. You will work closely with various engineering teams and require a strong background in...Full time
Amazon
San Francisco, CA1 day ago $141.3k - $226k
...leading supplier of state-of-the-art SoC and embedded IP, is looking for... ...be joining a high performance design team responsible for state-of-... ...customer requirements. The engineer will be responsible for a variety of advanced verification tasks such as: verification environment...Work experience placementLocal area- ...Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and... ...architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random...
- ...Job Title: Design Verification Engineer (DV) Experience Required: 5 to 10 Years Duration: 12 months Job Location: (United States / Remote)... ...experienced Design Verification Engineer with a strong background in SoC/IP verification, particularly within the ARM ecosystem. The...Remote work
- ...Digital ASIC Design Verification Engineer Minneapolis, MN (onsite) US Citizen or US Permanent Resident Full-Time + Health Benefits + 401K Plan... ...architectures and specifications for complex design blocks and SOCs • Implementing complex digital designs using reusable RTL...Permanent employmentFull time
- ...implementing the digital chip SOCs for communications via Low... ...Implement a state of the art verification environment to facilitate testing... ...· Work with the design and communication systems team... ...Electrical / Communications Engineering or Computer Science, or related...Permanent employmentFull time
- ...A leading semiconductor company in San Jose is seeking a Senior Design Engineer to drive the development of high-speed interfaces and digital components. This role involves RTL design, timing constraint management, and mentoring other engineers. Applicants should have...Full time
CareerArc
San Jose, CA5 days ago - ...leading semiconductor company is seeking a self-motivated Senior Design Engineer to focus on RTL design and validation of high-speed... ...digital design, Verilog/System Verilog, and collaboration with verification teams. This role also demands excellent problem-solving capabilities...Full time
AMD
San Jose, CA5 days ago $156.5k - $211.7k
...team, a key part of Arm's Solutions Engineering group, as a Verification Engineer! We are a dedicated group of... ...new subsystems and System-on-Chips (SoCs). Our mission is to accelerate... ...of driving verification of SoC RTL designs that are modified for FPGA implementation...Full timeWork at officeLocal area
