ASIC Design Engineer Technical Lead
$186.9k - $267.7kCisco Systems
The application window is expected to close on: 09/01/2026Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.Meet the TeamThe Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.Your ImpactParticipate in and contribute to chip architecture definition and discussions.Author design specifications and participate in micro-architecture specification reviews.Implement Verilog RTL to meet timing and performance requirements.Help define, evolve, and support our design methodology.Mentor junior engineers on performing project tasks and problem solving.Collaborate with the verification team to address design bugs and close code coverage.Work closely with physical design team to close design timing and place-and-route issues.Triage, debug, and root cause simulation, software bring-up, and customer failures.Perform diagnostic and post silicon validation tests in the lab.Minimum QualificationsBachelor’s degree in Electrical or Computer engineering and 8+ years of ASIC Design experience, or Master’s degree in Electrical Engineering or Computer Engineering and 6+ years of ASIC Design experience, or PhD in Electrical Engineering or Computer Engineering + 3 years in ASIC Design experience.Verilog/System Verilog programming experience.Interactive and waveform debug experience.Experience delivering ASIC designs from specification to tape-out.Experience in architecture and micro architecture development.Preferred QualificationsExperience resolving setup and hold timing violations with RTL modification.Scripting experience (Python, Perl, TCL, shell programming).Demonstrated ability in troubleshooting and debugging.Good written and verbal communication skills.Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada:The starting salary range posted for this position is $186,900.00 to $267,700.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by CiscoNon-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employeesExempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the nextAdditional paid time away may be requested to deal with critical or emergency issues for family membersOptional 10 paid days per full calendar year to volunteerFor non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:.75% of incentive target for each 1% of revenue attainment up to 50% of quota;1.5% of incentive target for each 1% of attainment between 50% and 75%;1% of incentive target for each 1% of attainment between 75% and 100%; andOnce performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.The applicable full salary ranges for this position, by specific state, are listed below:New York City Metro Area:$186,900.00 - $307,800.00Non-Metro New York state & Washington state:$166,300.00 - $274,100.00* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.Job SummaryJob number: 2012543Date posted : 2026-07-28Profession: Product and EngineeringEmployment type: Full time
$186.9k - $267.7k
...help each other grow. Because full product development—from design to qualification to production—is within our team, we’re... ...be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with verification...SuggestedFull timeTemporary workWork at officeLocal areaFlexible hours$143.8k - $230k
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We are now looking for a Senior ASIC Floorplan Design Engineer!NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world’s leading SoC's and GPU's. This position offers you a unique opportunity to craft and to influence the design and development...Full time$150k - $250k
Job Title: Senior ASIC Design EngineerJob Location: Santa Clara, CA or Boston, MACompensation... ...a highly skilled Senior ASIC Design Engineer to lead the design and development of advanced... ....Mentor junior engineers and provide technical guidance on best practices in ASIC...$136k - $218.5k
...world. This is our life’s work, to amplify human inventiveness and intelligence.We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. If you want to challenge yourself and be a part of something great,...Full timeShift work$136k - $218.5k
We are now looking for an ASIC Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting...Full time$116k - $189.75k
...a lasting impact on the world.At NVIDIA, our passion for innovative technology and dedication to excellence guide us. As an ASIC Design Engineer, you will build powerful SoC and GPU products. These products support everything from consumer graphics to self-driving cars...Full timeWork experience placement$136k - $218.5k
...their best work. Come join the team and see how we can make a lasting impact on the world. NVIDIA is looking for an Senior ASIC Design Engineer to join our Memory Subsystem Team!Whatyou'llbedoing:As a member of our Memory Subsystem Design team, you will collaborate with...Full time$136k - $218.5k
...of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical... ...to see:Master’s Degree in Electrical Engineering, Computer Engineering or Computer Science... ...preferred as is a deep understanding of ASIC design flow including RTL design and verification...Full time$125.7k - $203.1k
...grow. Because full product development—from design to qualification to production—is within... ...world. Your Impact As a Physical Design Engineer, you will play a key role in the full RTL... ...and work experience should be in ASIC Physical Design, ASIC design, engineeringor...Full timeTemporary workWork experience placementInternshipLocal areaFlexible hours- ...perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: AMD is looking for an ASIC Design STA engineer to contribute to the development of large SoCs, featuring multiple physical blocks and over 300 clock domains. The...
$168k - $264.5k
We are now looking for a Senior ASIC Design Engineer to join our DFT team!NVIDIA has continuously reinvented itself over two decades. Our invention... ...mindset—with a curiosity and passion for solving complex technical challengesWays to Stand out from the Crowd:Experience with...Full time$176.6k - $247.3k
...Acceleration team you’ll be responsible for the design and optimization of hardware in our data... ...technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new... ...job responsibilitiesAs an ASIC Design Engineer, you will:• Develop and implement high-performance...Local areaWork from homeFlexible hours$213k - $287.5k
Annapurna Labs designs silicon and software that accelerates innovation... ...stacks enable us to take on technical challenges that have never... .... We’re looking for an ASIC Design Eengineer to help us trail... ...our team members develop your engineering expertise so you feel empowered...Local areaFlexible hours- ...ASIC RTL Design Engineer Responsible for microarchitecture and RTL design of high performance data processing chip. Micro-architecture definition, writing micro-architecture specifications. Write high performance and low power Verilog RTL, synthesis and timing closure...
$121.9k - $195k
...efficiency.We are looking for engineers that want to create new designs that can evolve rapidly... ...product line, the lead product for a new line of... ...along with opportunities for technical leadership.BSEE and 8+ years... ...Hands-on experience in the ASIC design process; including...Full timeLocal areaWorldwide$168k - $264.5k
...team and see how you can make a lasting impact on the world.NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the design and implementation of the world’s leading inference accelerator. This position offers the opportunity to have real impact in a...Full time$250.6k - $362.6k
...help each other grow. Because full product development—from design to qualification to production—is within our team, we’re... ...outputs.Minimum QualificationsBachelor’s degree in Engineering and 15+ years of ASIC related experience, Master’s degree in Engineering and 12...Full timeTemporary workLocal areaFlexible hours$129.2k - $209k
...outcomes.Job SummaryYour Career As a Design Verification engineer on the ASIC team, you will ensure that the... ...firewall products meet or exceed industry-leading requirements for features,... ...Expertise in SystemVerilog and UVM Technical strength in the following areas is...Full timeCasual workWork at office$140k - $229.8k
Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:As a leading technology innovator, Qualcomm pushes the boundaries... ...chip sets and is seeking Hardware Design engineers with solid ASIC design experience...Work experience placementWork from home$186k - $407k
...and advance faster than ever.Principal ASIC Design EngineerAbout the RoleAt Micron, we transform... ...to execute.As the Principal ASIC Design Engineer, you will be the primary digital... ...tools.Coordinate with the analog design lead on top-level chip integration, analog/digital...Full timeFor contractorsLocal areaImmediate start- As a Senior ASIC Physical Design Engineer, you will execute synthesis, place-and-route, and static timing analysis for SoC partitions, working closely with RTL, architecture, and DFT teams. You will resolve timing, EM/IR, and physical verification issues, drive block-level...
- ...NVIDIA is seeking a Senior ASIC Design Engineer to join our Memory Subsystem Team in Santa Clara. You will collaborate with architects, verification, formal verification and physical design to deliver a world-class memory subsystem solution. You will own micro-architecture...
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- ...a dynamic environment. Responsibilities: Contribute to ASIC design for high-performance network chips: AINIC and DPU. Work within... ...architecture, IP design, physical design teams, and product engineers to ensure first-pass silicon success. Engage in Network-on-...Night shift
$200k - $300k
...Senior ASIC Design Verification Engineer Join Ethernovia's team to make a lasting impact on the future of packet processor-centric networking solutions to support the real-time sensor, Physical AI, and control data demands of software-defined autonomy across vehicles...Flexible hours
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