Senior DFT Architect for Space ASICs
Future Ventures
SpaceX is seeking a Principal DFT Engineer (Silicon Engineering) to lead the design‑for‑test efforts for Starlink ASICs. You will drive DFT architecture, scan insertion, memory and logic‑BIST, and work with RTL, gate netlists, and Siemens Tessent tools across cross‑functional teams. The role emphasizes ATPG pattern generation, post‑silicon validation, UPF, Verilog/SystemVerilog proficiency, and test automation using Python/Tcl. SpaceX offers competitive compensation and extensive benefits. #J-18808-Ljbffr Future Ventures
- SpaceX is seeking a Principal DFT Engineer (Silicon Engineering) to lead DFT architecture design for next-generation ASICs used in Starlink and space systems. You will collaborate with cross-disciplinary teams across systems, firmware, design, validation, and ASIC implementation...Senior
- Hewlett Packard Enterprise Development LP in Sunnyvale, CA is looking for a seasoned engineer to develop test strategies and DFT solutions for ASICs and 2.5D SiPs. The ideal candidate will have over 15 years of experience, focusing on innovative designs with strong...Senior
- QFocus Technologies LLC seeks a Senior DFT Engineer to define, architect, and execute robust Design-for-Test strategies for high-performance SoCs/ASICs. You will collaborate with front-end, physical, verification, and product teams to maximize test coverage and yield. You...Senior
- SpaceX is seeking a Principal DFT Engineer (Silicon Engineering) to lead the implementation and optimization of DFT architectures for next-generation ASICs used in space and ground infrastructure. You will own ATPG methodologies, validate scan insertion readiness, and integrate...Suggested
- SpaceX in California seeks a Principal DFT Engineer (Silicon Engineering) to lead the implementation and optimization of DFT architectures for Starlink ASICs, collaborating with systems, firmware, design, validation and ASIC teams. The role requires ATPG pattern generation...Suggested
- QFocus Technologies in Sunnyvale, CA, is seeking a Senior DFT Engineer to define and execute robust Design-for-Test strategies for high-performance SoCs/ASICs, collaborating with front-end, physical design, verification and product teams. You will lead pre-silicon activities...Senior
$164.9k - $223.1k
ASIC/FPGA Design and Verification Engineer - Space Electronics - (Senior or Principal) - MTVCompany:The Boeing CompanyBoeing Space, Intelligence & Weapons Systems has... ...engineers to drive requirements capture and architect digital logic functions to meet mission/customer...SeniorPermanent employmentFull timeWork experience placementInterim roleRelocationVisa sponsorshipWork visaFlexible hoursShift workDay shift- Entrada Ventures is seeking a Senior DFT Verification Engineer to drive robust verification for ASIC DFT logic across planning, development, and closure. You will build scalable environments, guide test strategies, and collaborate with DFT design and manufacturing teams...Senior
- ...product operations teams. You will design, validate, and deploy DFT solutions for digital, analog, and photonic logic, collaborating... ...silicon bring-up in a fast-paced, innovative environment. A strong ASIC pre-silicon background is essential. #J-18808-Ljbffr LightmatterSenior
- SpaceX is seeking a motivated Sr. ASIC DFT Engineer for their team in Sunnyvale, California. The engineer will work on developing next-generation ASICs for deployment in space and ground infrastructures. Responsibilities include optimizing DFT architectures and collaborating...Senior
- SpaceX is seeking a Sr. ASIC DFT Engineer to develop advanced ASICs for space and ground infrastructures. This role involves optimizing DFT architectures and collaborating with various engineering teams to enhance the Starlink network's capabilities. Ideal candidates will...Senior
- SPACE EXPLORATION TECHNOLOGIES CORP is seeking a SR. ASIC DFT ENGINEER to develop next-generation ASICs for Starlink, enhancing global internet connectivity. The ideal candidate has a Bachelor’s degree in electrical engineering and at least 5 years of experience in semiconductor...Senior
$175k - $280k
...goal of enabling human life on Mars.SR. ASIC DFT ENGINEER (SILICON ENGINEERING)At SpaceX we... ...next-generation ASICs for deployment in space and ground infrastructures around the globe... ...AND BENEFITS:Pay Range:DFT Engineer/Senior: $175,000.00 - $280,000.00/per year Your...SeniorPermanent employmentTemporary workWorldwideWeekend work- ...Enterprise is seeking an experienced Distinguished Technologist to own hardware architecture, microarchitecture and delivery of complex ASICs from concept to tape‑out and silicon bring‑up. The role combines deep system/RTL expertise with cross‑functional leadership to drive...Senior
- SpaceX is seeking an experienced Senior RTL Design Engineer (Silicon Engineering) to develop next-generation ASICs for Starlink and space-ground infrastructure. You will work with cross-disciplinary teams on architecture, verification, and integration, delivering fully...Senior
- SPACE EXPLORATION TECHNOLOGIES CORP is looking for a motivated SR. RTL DESIGN ENGINEER in Sunnyvale, CA to develop cutting-edge ASICs for Starlink. This role includes responsibilities in evaluating design architectures, implementing RTL in Verilog/System Verilog, and collaborating...Senior
- SPACE EXPLORATION TECHNOLOGIES CORP (SpaceX) is seeking a Development Manager to drive silicon projects crucial for the Starlink satellite... ...development. The role requires strong technical background in ASIC processes and communication skills for stakeholder engagement....Senior
$240k - $300k
Job Title: Sr. ASIC/SoC ArchitectJob Location: San Jose, CA or Irvine, CACompensation: $240K - $300K base Depending on experience plus... ...OverviewWe are seeking a highly skilled Sr. ASIC/SoC Architect to lead the design and development of advanced System on Chip (...SeniorFlexible hoursNight shift$152k - $241.5k
We are now looking for a Senior Hardware SoC Architect! Do you want to be a part of Artificial Intelligence... ...-disciplinary, working with software, ASIC design, verification, physical design,... ..., Physical Design, Software, DFT, Security, Automotive Safety and others...SeniorFull timeWork experience placement$255k - $270k
...located in Mountain View, CA, where we are onsite three days per week.Summary Of How You Will Impact SkyloSkylo is hiring a Space Mission Architect for our next‑generation Direct‑to‑Device (D2D) / Direct‑to‑Cell LEO constellation, owning the end‑to‑end space segment...Permanent employmentLocal areaRemote workWorldwideFlexible hours3 days per week- Ricursive Intelligence is seeking a senior physical design engineer to own the RTL-to-GDSII flow end-to-end, from synthesis to tapeout,... ..., and build Python/Tcl automation while collaborating with RTL, DFT, and foundry groups. This role shapes how our self-improving design...Senior
- ...and integration, translating architectural specs into synthesizable RTL that meets PPA targets. You will collaborate with DV, PD, and DFT teams across the RTL2GDS flow to tape out silicon, while leveraging Python/Tcl for automation and tackling advanced interconnects and...Senior
$156k - $229k
A leading tech company in Sunnyvale, CA, is seeking a Mid-level Design Verification Engineer. In this role, you will shape cutting-edge TPU technology for AI/ML applications. You will be responsible for verifying complex digital designs, collaborating with design teams,...Senior- Cerebras is looking for a senior role focused on performance analysis for AI architecture in Sunnyvale, California. As part of Cerebras, you'll work on the world’s largest AI chip, contributing to groundbreaking advancements in AI technology. Responsibilities include translating...Senior
$136k - $218.5k
...intelligence. Our team has some of the most forward-thinking and hardworking people in the world. We are now looking for a motivated DFT-Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join us today...SeniorFull time$160k - $220k
A stealth-mode startup in California is seeking an experienced DFT Verification Engineer to ensure the functionality and quality of ASIC DFT logic. This role involves building verification environments, executing coverage plans, and collaborating with design engineers....$200k - $300k
Job Title: Principal ASIC Architect - Memory Systems & AI InterconnectsJob Location: Santa Clara, CA or Boston, MACompensation: $200K - $300K plus bonus and equityRequirements: ASIC Architecture, Memory Subsystems, CXL / NVLink / PCIe / UCIe/ UALink / RDMA, ARM CHI, AI...- ...located in Mountain View, California, is seeking an experienced DFT Engineer specialized in architecture and verification for SoCs. The... ...field and have a deep understanding of test methodologies and fault models relevant to ASIC design. #J-18808-Ljbffr Quest GlobalSenior
- SpaceX is seeking a Senior RTL Design Engineer (Silicon Engineering) in California to develop next‑gen ASICs for Starlink and space networks. You will define architecture, write RTL in Verilog/SystemVerilog, and work with verification and physical teams to deliver timing...Senior
$220k - $355k
...of enabling human life on Mars.PRINCIPAL DFT ENGINEER (SILICON ENGINEERING)At SpaceX we... ...design, validation, product engineering and ASIC implementation). In this role, you will be... ...next-generation ASICs for deployment in space and ground infrastructures around the globe...Permanent employmentTemporary workWorldwideWeekend work
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