Fpga Design Engineer

Job Description

Job Description

Job Title: FPGA Design Engineer (Senior-Level Digital Design) Job Description

This Senior-level FPGA Design Engineer role focuses on full life-cycle digital product development for aerospace, defense, SATCOM, and infrared systems. You will translate complex system requirements into robust digital hardware and FPGA implementations, working with cutting-edge technologies from major FPGA vendors to support high-speed interfaces, RF digital signal processing, embedded processing, and processor interfaces. The position is ideal for a well-tenured engineer who enjoys solving difficult problems, leading technical efforts with minimal guidance, and contributing to mission-critical systems for defense applications.

• Lead full life-cycle digital product development from system concept and requirements through design, implementation, verification, production, and field support.
• Translate system performance and operational requirements into detailed embedded system requirements, digital design specifications, and test specifications.
• Design, implement, and verify digital hardware circuits and FPGA-based subsystems using modern FPGA technologies from major vendors, including Xilinx and Intel (Altera).
• Perform digital hardware circuit design, including simulation, schematic capture, test, integration, and troubleshooting.
• Develop, code, and verify FPGA designs using HDL (VHDL and/or Verilog), ensuring robust functionality and performance.
• Create and maintain testbenches for functional verification using tools such as Mentor Graphics QuestaSim, ensuring thorough coverage and validation.
• Drive synthesis, static timing closure, physical implementation, and FPGA image generation using tools such as Xilinx Vivado and Synopsys Synplify Pro.
• Implement real-time digital signal processing (DSP) algorithms within FPGAs, using provided algorithms and specifications to achieve bit-exact behavior.
• Apply high-speed digital design techniques, including pipelining, asynchronous clock domain management, synchronization, finite state machine design, multi-cycling, and FIFO usage.
• Read, interpret, and create Interface Control Documents (ICDs) to ensure accurate and reliable system and subsystem integration.
• Use documentation and revision control practices to manage design artifacts, code, and configuration baselines.
• Collaborate closely with another team lead and cross-functional teams to coordinate design activities, resolve technical issues, and support program objectives.
• Provide technical leadership and mentoring to other engineers, sharing best practices and guiding less-experienced team members.
• Communicate effectively with stakeholders at all levels, including internal teams and external partners, to present design approaches, trade studies, and technical decisions.
• Support integration and test activities in lab or field environments, including debugging and resolving complex digital and FPGA-related issues.
• Contribute to projects supporting sustainment and enhancement of advanced aircraft systems and related electronic warfare and defense applications.

• Bachelors degree in Electrical Engineering, Computer Engineering, or a similar engineering discipline.
• Minimum 9 years of digital electronics design experience with a bachelors degree, or minimum 7 years of digital electronics design experience with a masters degree in a technical field.
• Extensive experience in digital hardware circuit design, including simulation, schematic capture, test, and integration.
• Strong experience with HDL design using VHDL and/or Verilog.
• Thorough understanding of synthesis, static timing closure, physical implementation, and FPGA image generation.
• Demonstrated ability to create strong testbenches and perform comprehensive verification of FPGA designs.
• Hands-on experience using Xilinx Vivado for FPGA implementation.
• Hands-on experience using Synopsys Synplify Pro for synthesis.
• Hands-on experience using Mentor Graphics QuestaSim (QuestSim) for simulation and verification.
• Experience implementing real-time digital signal processing (DSP) algorithms within FPGAs.
• DSP experience with the ability to implement DSP algorithms (creation from scratch is not required).
• Experience with high-speed digital design techniques, including pipelining, asynchronous clock domains, synchronization, finite state machines, multi-cycling, and FIFOs.
• Ability to read and create Interface Control Documents (ICDs).
• Familiarity with documentation and revision control practices for digital and FPGA design artifacts.
• Proven ability to lead technical efforts with minimal guidance and work as a well-tenured Senior-level engineer.
• Demonstrated skills in team leadership, mentoring, and collaboration with cross-functional teams.
• Strong communication skills with the ability to engage effectively at all organizational levels, internally and externally.
• Adaptable, creative, and comfortable working independently while solving complex technical problems.
• U.S. citizenship and eligibility to obtain and maintain a government security clearance.
• Experience in electronic warfare (EW) or defense-related environments sufficient to support clearance eligibility.

• Advanced degree (masters or higher) in Electrical Engineering or Computer Engineering with a minimum of 12 years of digital electronics design experience is preferred.
• Experience with algorithm modeling using MATLAB, including generating bit-exact test vectors.
• Hands-on experience using MATLAB in support of DSP and FPGA development.
• Experience working with Xilinx and Intel (Altera) FPGA families; specific product lines are flexible.
• Working knowledge of Electronic Warfare systems.
• Experience in the aerospace and/or defense industries.
• Current or previous Secret security clearance is highly desirable.
• Background supporting systems for advanced aircraft platforms and sustainment programs.
• Experience collaborating with U.S. Air Force or similar defense customers is beneficial.
• Comfort participating in technical panel interviews and discussing detailed design trade-offs and implementation strategies.

The role supports mission-critical aerospace and defense programs, including advanced aircraft sustainment, using cutting-edge digital and FPGA technologies. Work may be performed onsite at a cleared facility or in a remote arrangement, with onsite presence typically required for the first one to two weeks before transitioning to remote work, depending on project needs and approvals. The environment involves collaboration with another team lead and cross-functional engineering teams, as well as interaction with defense customers. You will use industry-standard EDA tools such as Xilinx Vivado, Synopsys Synplify Pro, Mentor Graphics QuestaSim, and MATLAB, working primarily on FPGA-based digital designs for high-speed, DSP-intensive applications. The facility operates under government security requirements, and all work complies with established documentation, configuration management, and revision control processes. The schedule aligns with a professional engineering environment, with flexibility driven by program milestones and integration activities.

This is a Contract to Hire position based out of Chicago, IL.

The pay range for this position is $80.00 - $125.00/hr.

Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.

Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following: Medical, dental & vision Critical Illness, Accident, and Hospital 401(k) Retirement Plan Pre-tax and Roth post-tax contributions available Life Insurance (Voluntary Life & AD&D for the employee and dependents) Short and long-term disability Health Spending Account (HSA) Transportation benefits Employee Assistance Program Time Off/Leave (PTO, Vacation or Sick Leave)

This is a fully remote position.

This position is anticipated to close on Oct 20, 2026.

About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications withoutregard to race, sex, age, color, religion, national origin, veteran status, disability,sexual orientation, gender identity, genetic information or any characteristic protectedby law.

If you would like to request a reasonable accommodation, such as the modification oradjustment of the job application process or interviewing process due to a disability,please email View email address on ziprecruiter.com for other accommodation options.

San Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in thecity and county of San Francisco, we will consider for employment qualified applicantswith arrest and conviction records.

Massachusetts Lie Detector: It is unlawful in Massachusetts to require or administer a lie detector test as acondition of employment or continued employment. An employer who violates this lawshall be subject to criminal penalties and civil liability.

Use of Artificial Intelligence (AI): We may use Artificial Intelligence (AI) to support parts of our hiring process,including sourcing, screening, and evaluating candidates. AI helps assess applicationsand qualifications, but final decisions are made by our hiring team. By applying, youacknowledge and agree that your application may be reviewed using AI tools.