Senior ASIC Implementation Lead: DSP & PPA Optimization
Arycs Technologies
Arycs Technologies in Los Gatos, CA, seeks a Staff ASIC Implementation Engineer to lead RTL-to-synthesis, timing analysis, and tapeout readiness for DSP ASIC programs. You will coordinate with RTL/verification and external backend teams to drive PPA optimization and design closure. The role emphasizes hands-on technical leadership, development of automation scripts, and collaboration across cross-functional teams to ensure first-pass silicon success. #J-18808-Ljbffr Arycs Technologies
Vacancy posted 20 hours ago
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