Senior Verification Engineer

Owning verification planning and execution, the contract Senior Verification Engineer will work remotely on a high-throughput modem and DSP-intensive digital beamformer project, focusing on defining verification strategies and methodologies for ASIC and SoC components. Key responsibilities: Manage verification planning and execution for complex blocks and subsystems, ensuring alignment from test plan to sign-off Translate design specifications into effective verification strategies and measurable coverage goals while identifying high-risk scenarios early Develop verification environments and infrastructure, applying AI-assisted capabilities for stimulus generation and coverage analytics Required qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, or 7+ years equivalent experience Minimum five years of professional experience in ASIC or SoC functional verification Hands-on expertise in SystemVerilog, UVM, or formal testbench development and maintenance Experience with metric-driven verification for planning, assertions, and functional coverage closure Experience verifying complex digital control and datapath logic, including RTL and system-level debug