FPGA Design Engineer

SAAZ Micro is seeking a talented camera Firmware Engineer for the design, development, integration, and validation of embedded firmware for advanced visible, SWIR, MWIR, and LWIR imaging systems. This role bridges image sensor hardware, FPGA logic, camera electronics, and application software to deliver high-performance imaging solutions for commercial, aerospace, defense, and scientific applications. The ideal candidate has strong experience with embedded systems, camera interfaces, real-time firmware development, and hardware bring-up. Key Responsibilities Develop and implement FPGA firmware (VHDL or Verilog) for image sensor control, high-speed data acquisition, synchronization, and real-time processing. Interface directly with visible and infrared (SWIR, MWIR, LWIR) sensors, including custom ROICs and commercial CMOS sensors. Design and manage high-speed interfaces such as LVDS, MIPI CSI-2, Camera Link, USB 3.0, 10G Ethernet, or similar. Collaborate with image sensor engineers, system architects, and software teams to define sensor readout sequences, timing control, and data pipelines. Bring up new hardware in the lab, including test and debug using oscilloscopes, logic analyzers, and protocol analyzers. Document designs, interface specifications, and participate in hardware validation and production support. Required Qualifications B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field. 5+ years of experience in camera system design or embedded hardware engineering. Proven expertise in: FPGA development using VHDL or Verilog (AMD/Xilinx or Intel/Altera toolchains) High-speed signal design and layout for imaging or data acquisition systems. Experience interfacing with visible and IR image sensors Familiarity with Git version control. Excellent analytical and troubleshooting skills. Desired Qualifications Familiarity with sensor timing, synchronization, and real-time video streaming. Experience optimizing image acquisition pipelines. Experience implementing image correction algorithms. Familiarity with secure boot and firmware update mechanisms. Experience with Python for automation and testing. Familiarity with: GigE Vision GenICam USB3 Vision Camera Link CoaXPress Success Metrics Firmware compiles without critical warnings. CPU utilization and memory usage meet design goals. Communication interfaces (SPI, I²C, USB, Ethernet, etc.) achieve required throughput. Compliance with coding standards Unit and integration tests successfully completed. #J-18808-Ljbffr