Senior FPGA Engineer

Senior FPGA Engineer Responsible for designing, developing, modifying, and evaluating electronic parts, components, integrated circuitry for electronic equipment, other hardware systems, or electrical engineering applications. Duties include analyzing equipment to establish operating data, conducting experimental tests, evaluating results, and selecting components based on analysis of specifications and reliability. Mastodon Design specializes in designing and building hardware and software to meet our customers’ next requirement. We focus on offering devices that can be fielded immediately to meet the mission needs that lie directly ahead. Size, weight, power, and packaging are of paramount importance in everything we design and build. We are seeking an FPGA Engineer to work on the development of our wireless product line. The role requires understanding of both theoretical and practical aspects of designing FPGA solutions for RF products. An ideal candidate will have demonstrable experience designing such solutions in a commercial environment with aggressive time‑scales and the ability to collaborate with cross‑functional design teams. Candidates must possess solid interpersonal and excellent oral and written communication skills. You’ll Bring These Qualifications: BS in EE or similar field and experience in designing DSP/FPGA solutions 10+ years of relevant experience Ability to obtain and maintain minimally a Secret clearance In-depth understanding of HDL coding in VHDL, Verilog, and System Verilog Pin and Timing Constraints management Demonstrated ability to debug complex FPGA designs in a system Ability to implement and debug complex high‑speed architectures like JESD204C, 2.5G, 10G, 40G, 100G Ethernet Ability to implement and debug VITA‑49 transport layer in a system Communications systems, associated algorithms and design; understanding of RF filters, signal modulation/demodulation, channel equalization/estimation, channel coding (FEC), RF signal acquisition, RF frequency control (AFC), RF gain control (AGC) DSP baseband signal processing and task scheduling DSP peripheral programming and control Programming DSP and FPGA devices using Python, C/C++, MATLAB/Simulink and VHDL Self‑starter who likes working in a team environment Any of These Qualifications Would be Nice to Have: Interpreting and implementing wireless standards such as 3GPP (LTE, WCDMA, GSM), IEEE 802.11 (WiFi), and IEEE 802.15 (UWB, Zigbee) Mixed signal requirements including quantization bits, dynamic range (SFDR), power consumption and design of baseband equivalent models; experience designing solutions to overcome imperfections in the RF signal path Demonstrated ability in bringing up custom hardware with FPGAs or SoCs Experience with SoCs such as Ultrascale+, Zynq 7000, Agilex, etc. Experience with softcore processors such as Picoblaze, Microblaze, NIOS Experience with DMA and AMBA Buses such as AXI/AXIS and ACP Simulation experience – understanding of abstracted SystemVerilog classes and packages Pay Range: $98,500 – $206,800 CACI is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, age, national origin, disability, status as a protected veteran, or any other protected characteristic. #J-18808-Ljbffr