Senior Verification Architect: AI Interconnect & SystemVerilog
Arm
Arm is seeking a Design Verification Engineer in Austin, Texas to work on the ARM Neoverse Coherent Mesh Network. This role involves building verification plans, collaborating with architects and developing efficient test benches using SystemVerilog/UVM. The ideal candidate will have at least 7 years of hands-on verification experience, significant CPU microarchitecture knowledge, and a background in System Verilog/UVM. A hybrid working model is offered to balance performance and personal wellbeing. #J-18808-Ljbffr Arm
Vacancy posted 1 day ago
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