ASIC DFT Verification Lead - Hybrid San Jose
Cisco
The Silicon One team at Cisco is seeking a DFT Verification Lead in San Jose, CA. You will own test planning and develop test benches to verify DFT architecture for ATE screening, in-system test, and debug needs. You will collaborate across front-end RTL, back-end physical design, and PD teams to validate tests in all design phases and post-silicon flows. Ideal candidates bring 8+ years of related experience or 6+ years with a Master's, and strong SystemVerilog and DVE/Verdi debugging skills.
#J-18808-LjbffrVacancy posted 3 days ago
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