Senior Hardware Design Engineer

AccelerComm is seeking multiple Senior Design Engineers to contribute to groundbreaking technology in non-terrestrial communications, specifically a 5G base station for satellites. This role involves working on advanced baseband signal processing technology that enhances error resilience, capacity, and power efficiency, aiming to provide global mobile coverage. The position focuses on developing space-qualified devices and delivering both standalone and integrated IP solutions. Responsibilities: Collaborate with Algorithm and System Architecture teams to translate requirements into micro-architectures for RTL implementations. Implement designs for FPGA and ASIC using industry-standard techniques, including creating testbenches. Deploy designs on FPGA development platforms for validation and system integration. Engage with AccelerComm's engineering methodology and processes, suggesting improvements for efficiency and quality. Work across the design flow, including micro-architecture, design, verification, physical implementation, and optimization for ASIC and FPGA. Qualifications: Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products. Strong experience in delivering digital designs in the ASIC and FPGA industry. Proven ability in optimizing timing and hardware resources for high throughput data or signal processing applications. Experience in technical documentation writing, including design specifications and verification plans. Skills: Expert user of EDA tools for simulation and synthesis. Knowledge of communications signal processing algorithms (error correction, equalization, etc.). Familiarity with AMBA bus protocols and UVM verification techniques. Experience with high-speed interfaces like PCI-E or JESD. Proficiency in a scripting language such as Python. Tell us what you're building and we'll recommend qualified vendors for your project. ASIC Design Services Verification Packaging & Wafer Semiconductor IP Find the Right Semiconductor Partner Tell us what you're building and we'll recommend qualified vendors for your project. ASIC Design Services Verification Packaging & Wafer Semiconductor IP Work Email Free No obligation Response within 24 hours #J-18808-Ljbffr