Senior ASIC CAD Engineer - Front‑End to Tape‑Out Automation
Palo Alto Networks
Palo Alto Networks is seeking an ASIC CAD Engineer in Santa Clara, California. This critical role involves bridging front-end logic and physical design, executing logic synthesis, timing analysis, and power optimization. The ideal candidate will have a BS/MS in Electrical Engineering or a related field with 10+ years of experience in ASIC design. Responsibilities include enhancing design flows and using scripting to automate processes. Palo Alto Networks is an equal opportunity employer. #J-18808-Ljbffr Palo Alto Networks
Vacancy posted 4 days ago
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