HBM SoC RTL Design Engineer
$146k - $297k1000 Micron Technology, Inc.
Role Overview As a SoC Design Engineer in the Heterogeneous Integration Group (HIG), you will design, develop, and integrate next‑generation HBM SoC logic die. You will collaborate with architecture, verification, physical design, firmware, and product teams to deliver robust, high‑performance SoC solutions that meet power, performance, area, and schedule targets. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP such as controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, and PHY‑adjacent logic. Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, performing root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate cross‑functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Qualifications Minimum: Bachelor’s or master’s degree in electrical engineering, computer engineering, or a related field. Minimum of 10 years of experience in a related field. Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies. Experience with RTL‑to‑GDS flow, including synthesis, static timing analysis, and sign‑off considerations. Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens. Programming or scripting experience (Python, TCL, Perl, or shell scripting). Preferred: Experience with HBM, DRAM, or memory‑centric SoC designs. Familiarity with high‑speed interfaces, clocking strategies, reset architectures, and power management concepts. Exposure to DFT concepts (scan, MBIST, BIRA/BISR) and debug. Experience with hardware emulation or acceleration platforms such as Palladium, Veloce, or Zebu. Compensation The US base salary range for this full‑time position is $146,000.00 – $297,000.00 per year. Additional compensation may include benefits, bonuses, and equity. Benefits Micron offers medical, dental, and vision plans; income protection programs; paid family leave; paid time‑off; and paid holidays. For additional details, see the Benefits Guide on micron.com/careers/benefits. Equal Opportunity Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity, or any other factor protected by applicable federal, state, or local laws. #J-18808-Ljbffr 1000 Micron Technology, Inc.
$146k - $297k
...communicate and advance faster than ever.As a SoC Design Engineer, you will be part of the Heterogeneous... ..., and integration of next‑generation HBM SoC logic die. You will work closely... ...hands-on technical role passionate about RTL build, IP integration, debugging, and pre...SuggestedFull timeLocal areaImmediate startNight shift- ...technical position focused on RTL build, IP integration, debugging... ...Group. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal... ...multi‑functionally with Product Engineering, Test, Probe, Process...SuggestedLocal areaNight shift
- As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing... ..., and integration of next‑generation HBM SoC logic die. You will work closely with... ...Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used...SuggestedLocal areaNight shift
$146k - $297k
1000 Micron Technology, Inc. is seeking a SoC Design Engineer to design and develop next-generation HBM SoC logic die. You will work with architecture, verification... ...various targets. The role requires collaboration on RTL design, integration of IPs, and participation in...Suggested- Micron Technology is looking for a SoC Design Engineer in Folsom, California, to contribute to next-generation HBM SoC logic die development. The role involves designing and implementing RTL for SoC-level blocks, collaborating with multi-functional teams, and participating...Suggested
- ...a hands-on technical role focused on RTL build and IP integration in the Heterogeneous... ...Group. This position involves designing RTL for SoC-level components and collaborating with... ...bachelor’s or master’s degree in electrical engineering or a related field with a minimum of 1...
$121k - $205k
...communicate and advance faster than ever.As a SoC Physical Design Engineer in the Heterogeneous Integration Group... ...drive the implementation of advanced HBM SoC logic/base die designs from... ...to GDSII. You will work closely with RTL design, verification, DFT, IP providers...Full timeLocal areaImmediate startNight shift$177k - $334k
SoC Physical Design Engineer In the Heterogeneous Integration Group (HIG), the engineer drives advanced HBM SoC logic/base die implementations from netlist to GDSII, collaborating closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing...Local areaNight shift- Micron Technology in Folsom, CA is looking for a senior SoC Physical Design Engineer to drive implementation from netlist to GDSII for advanced memory/SoC blocks. You will work with RTL, verification, DFT, IP, packaging and manufacturing to ensure top‑level integration...
$146k - $297k
...advance faster than ever.As an HBM Power Delivery Network (PDN) Engineer, you will be part of the... ...HIG), responsible for the design, analysis, and... ...ResponsibilitiesDesign and develop SoC-level and HBM-cube-level power... ....Familiarity with full RTL-to-GDSII design flow and...Full timeLocal areaImmediate start$199k - $347k
...faster than ever.As a Static Timing Analysis (STA) Engineer, you will be part of the Heterogeneous Integration Group... ...chip-level timing sign-off for next-generation HBM products. You will work closely with RTL design, physical design, architecture, DFT, verification, and...Full timeLocal areaImmediate start$175k - $309k
...reliability while influencing critical design decisions across the... ...implement, and review SystemVerilog RTL for advanced memory system... ...in Computer Science, Computer Engineering, Electrical Engineering, or a... ...and memory systems, including SoC-level behaviors and tradeoffsExperience...Full timeLocal areaImmediate start- ...Design Verification Engineer MAHIN-JOB-35440 Location: Folsom, CA, About the Role and Job: Design Verification Engineer (8-15 Years Experience... ...and resolve issues efficiently. Conduct full-chip and SoC simulations to validate design functionality and...Full time
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$141.91k - $269.1k
...CPU Pre-Silicon Verification Engineer, you will help ensure the quality... ...that verify complex CPU designs before silicon manufacturing.... ...you'll partner with architects, RTL designers, post-silicon engineers... ...driven validationExperience in IP/SOC ASIC ValidationExperience in...Full timeLocal areaImmediate startWorldwideShift work- ...Signal integrity (SI) & power integrity (PI) - Bump, RDL, package and power/grid layout creation Key Responsibilities: o Design and develop high-speed I/O circuits for advanced process nodes. o Perform system and circuit-level simulations to evaluate and optimize...
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...communicate and advance faster than ever.We are part of Micron’s HBM Design Architecture organization, where we push the limits of memory... ...every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and...Full timeLocal areaImmediate start$121.28k - $194.1k
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Job Details:Job Description: Join Intel as a Silicon Product Engineer, where you will play a pivotal role in ensuring the quality, reliability... ...innovation across the entire product lifecycle from initial design through high-volume manufacturing, directly impacting Intel's...Full timeLocal areaImmediate startShift work- AMD in California is hiring a Silicon Design Engineer (SMTS) to design, verify, and test ASICs for advanced semiconductor products. You will lead architecture and module interfaces, drive timing and power optimizations, and collaborate with cross-functional teams across...
- Solidigm Inc. seeks a 3D NAND IP Logic Design Engineer to help shape the future of memory technology in its Rancho Cordova, CA location. You... ...verify logic and circuit blocks for 3D NAND components, implement RTL in SystemVerilog, and drive sign-off with timed constraints...
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...Job Details: Job Description: The Role and Impact: Join Intel as a Physical Design Engineering Graduate Intern and contribute to shaping the future of silicon innovation. This hands-on role is an exciting opportunity to be part of the physical implementation of state...InternshipLocal areaImmediate startShift work$80k - $150k
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Roadway Design Engineer US-CA-Rancho Cordova Job ID: 2025-5454 Type: Regular Full-Time # of Openings: 1 Category: Transportation Planning & Design Overview As a roadway design engineer, you'll support transportation improvement projects with the design and detailing of...Full timeCasual workWork at officeLocal area
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