HBM SoC RTL Design Engineer
$146k - $297k1000 Micron Technology, Inc.
Role Overview As a SoC Design Engineer in the Heterogeneous Integration Group (HIG), you will design, develop, and integrate next‑generation HBM SoC logic die. You will collaborate with architecture, verification, physical design, firmware, and product teams to deliver robust, high‑performance SoC solutions that meet power, performance, area, and schedule targets. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP such as controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, and PHY‑adjacent logic. Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, performing root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate cross‑functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Qualifications Minimum: Bachelor’s or master’s degree in electrical engineering, computer engineering, or a related field. Minimum of 10 years of experience in a related field. Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies. Experience with RTL‑to‑GDS flow, including synthesis, static timing analysis, and sign‑off considerations. Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens. Programming or scripting experience (Python, TCL, Perl, or shell scripting). Preferred: Experience with HBM, DRAM, or memory‑centric SoC designs. Familiarity with high‑speed interfaces, clocking strategies, reset architectures, and power management concepts. Exposure to DFT concepts (scan, MBIST, BIRA/BISR) and debug. Experience with hardware emulation or acceleration platforms such as Palladium, Veloce, or Zebu. Compensation The US base salary range for this full‑time position is $146,000.00 – $297,000.00 per year. Additional compensation may include benefits, bonuses, and equity. Benefits Micron offers medical, dental, and vision plans; income protection programs; paid family leave; paid time‑off; and paid holidays. For additional details, see the Benefits Guide on micron.com/careers/benefits. Equal Opportunity Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity, or any other factor protected by applicable federal, state, or local laws. #J-18808-Ljbffr 1000 Micron Technology, Inc.
$146k - $309k
Micron Technology is seeking a SoC Design Engineer in Folsom, California, to contribute to next-generation HBM SoC logic die design. This hands-on role involves implementing RTL for SoC-level blocks, collaborating with cross-functional teams, and participating in pre/post...Suggested- Micron Technology is looking for a SoC Design Engineer in Folsom, California, to contribute to next-generation HBM SoC logic die development. The role involves designing and implementing RTL for SoC-level blocks, collaborating with multi-functional teams, and participating...Suggested
$146k - $297k
1000 Micron Technology, Inc. is seeking a SoC Design Engineer to design and develop next-generation HBM SoC logic die. You will work with architecture, verification... ...various targets. The role requires collaboration on RTL design, integration of IPs, and participation in...Suggested- Micron Technology, Inc is seeking a skilled HRB SoC Design Engineer located in Folsom, California. In this role, you will contribute to the design and development of next-generation HBM SoC logic die, collaborating closely with various engineering teams to ensure high-performance...Suggested
$146k - $309k
...communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous... ..., and integration of next-generation HBM SoC logic die. You will work closely... ...-on technical role passionate about RTL build, IP integration, debugging, and pre...SuggestedFull timeLocal areaImmediate startNight shift$146k - $309k
Role Summary As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII, working closely with RTL design, verification, DFT, IP providers, packaging/assembly...Local areaNight shift$146k - $309k
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Req ID: JR96895 Design and Verification Engineer, Pathfinding Our vision is to transform how the world uses information to enrich life for all. Micron... ...test (DFT) methodologies for memory products. Exposure to RTL verification, static timing analysis (STA), or timing-...Full timeLocal area$121.05k - $170.89k
GPU Design Verification Engineer page is loaded GPU Design Verification Engineer Apply locations US, California, Folsom time type Full time posted... ...and the intended implementation. Coding design changes in RTL, following team coding guidelines. Analyzing timing reports...Full timeWork experience placementInternshipSecond jobLocal areaShift work$141.91k - $269.1k
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